A sub-µW intracranial EEG integrated preamplifier
Resumen:
This work presents an amplifier targeting the acquisition of intracranial electroencephalography signals with low power consumption, low voltage supply, low noise, and high common-mode rejection ratio (CMRR). A prototype was designed in a 180 nm FD-SOI CMOS technology and characterized by simulations. It presents an input noise of 3.2 µV rms , a current consumption of 0.5 µA, and it operates from a 1.8 V voltage supply, which represents a power consumption of 0.9 µW. The bandwidth ranges from 0.1 Hz to 1 kHz, the gain is 40 dB, the CMRR is greater than 79.4 dB, and the Noise Efficiency Factor (NEF) is 2.7.
| 2022 | |
| Este trabajo recibió apoyo de ANII, CSIC y CAP | |
|
Semiconductor device modeling Low voltage Power demand Prototypes Voltage CMOS technology Brain modeling Analog integrated circuits Sub-threshold design EEG Low power DDA High CMRR |
|
| Inglés | |
| Universidad de la República | |
| COLIBRI | |
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https://ieeexplore.ieee.org/document/9948541
https://hdl.handle.net/20.500.12008/34945 |
|
| Acceso abierto | |
| Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| _version_ | 1807522899536379904 |
|---|---|
| author | Cabrera, Carolina |
| author2 | Oreggioni, Julián |
| author2_role | author |
| author_facet | Cabrera, Carolina Oreggioni, Julián |
| author_role | author |
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| collection | COLIBRI |
| dc.contributor.filiacion.none.fl_str_mv | Cabrera Carolina, Universidad de la República (Uruguay). Facultad de Ingeniería. Oreggioni Julián, Universidad de la República (Uruguay). Facultad de Ingeniería. |
| dc.creator.none.fl_str_mv | Cabrera, Carolina Oreggioni, Julián |
| dc.date.accessioned.none.fl_str_mv | 2022-11-21T16:44:56Z |
| dc.date.available.none.fl_str_mv | 2022-11-21T16:44:56Z |
| dc.date.issued.none.fl_str_mv | 2022 |
| dc.description.abstract.none.fl_txt_mv | This work presents an amplifier targeting the acquisition of intracranial electroencephalography signals with low power consumption, low voltage supply, low noise, and high common-mode rejection ratio (CMRR). A prototype was designed in a 180 nm FD-SOI CMOS technology and characterized by simulations. It presents an input noise of 3.2 µV rms , a current consumption of 0.5 µA, and it operates from a 1.8 V voltage supply, which represents a power consumption of 0.9 µW. The bandwidth ranges from 0.1 Hz to 1 kHz, the gain is 40 dB, the CMRR is greater than 79.4 dB, and the Noise Efficiency Factor (NEF) is 2.7. |
| dc.description.es.fl_txt_mv | Presentado y publicado en 2022 IEEE Biomedical Circuits and Systems Conference (BioCAS), Taipei, Taiwan, 13-15 oct. 2022, pp. 675-678. |
| dc.description.sponsorship.none.fl_txt_mv | Este trabajo recibió apoyo de ANII, CSIC y CAP |
| dc.format.extent.es.fl_str_mv | 4 p. |
| dc.format.mimetype.es.fl_str_mv | application/pdf |
| dc.identifier.citation.es.fl_str_mv | Cabrera, C. y Oreggioni, J. A sub-µW intracranial EEG integrated preamplifier [Preprint]. Publicado en: 2022 IEEE Biomedical Circuits and Systems Conference (BioCAS), Taipei, Taiwan, 13-15 oct 2022. ISSN: 2163-4025. DOI: 10.1109/BioCAS54905.2022.9948541 |
| dc.identifier.uri.none.fl_str_mv | https://ieeexplore.ieee.org/document/9948541 https://hdl.handle.net/20.500.12008/34945 |
| dc.language.iso.none.fl_str_mv | en eng |
| dc.rights.license.none.fl_str_mv | Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| dc.rights.none.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.source.none.fl_str_mv | reponame:COLIBRI instname:Universidad de la República instacron:Universidad de la República |
| dc.subject.es.fl_str_mv | Semiconductor device modeling Low voltage Power demand Prototypes Voltage CMOS technology Brain modeling Analog integrated circuits Sub-threshold design EEG Low power DDA High CMRR |
| dc.title.none.fl_str_mv | A sub-µW intracranial EEG integrated preamplifier |
| dc.type.es.fl_str_mv | Preprint |
| dc.type.none.fl_str_mv | info:eu-repo/semantics/preprint |
| dc.type.version.none.fl_str_mv | info:eu-repo/semantics/submittedVersion |
| description | Presentado y publicado en 2022 IEEE Biomedical Circuits and Systems Conference (BioCAS), Taipei, Taiwan, 13-15 oct. 2022, pp. 675-678. |
| eu_rights_str_mv | openAccess |
| format | preprint |
| id | COLIBRI_80f214b4ad3a0e59f020f76cca28706e |
| identifier_str_mv | Cabrera, C. y Oreggioni, J. A sub-µW intracranial EEG integrated preamplifier [Preprint]. Publicado en: 2022 IEEE Biomedical Circuits and Systems Conference (BioCAS), Taipei, Taiwan, 13-15 oct 2022. ISSN: 2163-4025. DOI: 10.1109/BioCAS54905.2022.9948541 |
| instacron_str | Universidad de la República |
| institution | Universidad de la República |
| instname_str | Universidad de la República |
| language | eng |
| language_invalid_str_mv | en |
| network_acronym_str | COLIBRI |
| network_name_str | COLIBRI |
| oai_identifier_str | oai:colibri.udelar.edu.uy:20.500.12008/34945 |
| publishDate | 2022 |
| reponame_str | COLIBRI |
| repository.mail.fl_str_mv | mabel.seroubian@seciu.edu.uy |
| repository.name.fl_str_mv | COLIBRI - Universidad de la República |
| repository_id_str | 4771 |
| rights_invalid_str_mv | Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| spelling | Cabrera Carolina, Universidad de la República (Uruguay). Facultad de Ingeniería.Oreggioni Julián, Universidad de la República (Uruguay). Facultad de Ingeniería.2022-11-21T16:44:56Z2022-11-21T16:44:56Z2022Cabrera, C. y Oreggioni, J. A sub-µW intracranial EEG integrated preamplifier [Preprint]. Publicado en: 2022 IEEE Biomedical Circuits and Systems Conference (BioCAS), Taipei, Taiwan, 13-15 oct 2022. ISSN: 2163-4025. DOI: 10.1109/BioCAS54905.2022.9948541https://ieeexplore.ieee.org/document/9948541https://hdl.handle.net/20.500.12008/34945Presentado y publicado en 2022 IEEE Biomedical Circuits and Systems Conference (BioCAS), Taipei, Taiwan, 13-15 oct. 2022, pp. 675-678.This work presents an amplifier targeting the acquisition of intracranial electroencephalography signals with low power consumption, low voltage supply, low noise, and high common-mode rejection ratio (CMRR). A prototype was designed in a 180 nm FD-SOI CMOS technology and characterized by simulations. It presents an input noise of 3.2 µV rms , a current consumption of 0.5 µA, and it operates from a 1.8 V voltage supply, which represents a power consumption of 0.9 µW. The bandwidth ranges from 0.1 Hz to 1 kHz, the gain is 40 dB, the CMRR is greater than 79.4 dB, and the Noise Efficiency Factor (NEF) is 2.7.Submitted by Ribeiro Jorge (jribeiro@fing.edu.uy) on 2022-11-18T17:02:57Z No. of bitstreams: 2 license_rdf: 23149 bytes, checksum: 1996b8461bc290aef6a27d78c67b6b52 (MD5) CO22.pdf: 3300903 bytes, checksum: 8314fbc123d98842d929e05671270145 (MD5)Approved for entry into archive by Machado Jimena (jmachado@fing.edu.uy) on 2022-11-21T16:39:49Z (GMT) No. of bitstreams: 2 license_rdf: 23149 bytes, checksum: 1996b8461bc290aef6a27d78c67b6b52 (MD5) CO22.pdf: 3300903 bytes, checksum: 8314fbc123d98842d929e05671270145 (MD5)Made available in DSpace by Luna Fabiana (fabiana.luna@seciu.edu.uy) on 2022-11-21T16:44:56Z (GMT). No. of bitstreams: 2 license_rdf: 23149 bytes, checksum: 1996b8461bc290aef6a27d78c67b6b52 (MD5) CO22.pdf: 3300903 bytes, checksum: 8314fbc123d98842d929e05671270145 (MD5) Previous issue date: 2022Este trabajo recibió apoyo de ANII, CSIC y CAP4 p.application/pdfenengLas obras depositadas en el Repositorio se rigen por la Ordenanza de los Derechos de la Propiedad Intelectual de la Universidad de la República.(Res. Nº 91 de C.D.C. de 8/III/1994 – D.O. 7/IV/1994) y por la Ordenanza del Repositorio Abierto de la Universidad de la República (Res. Nº 16 de C.D.C. de 07/10/2014)info:eu-repo/semantics/openAccessLicencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)Semiconductor device modelingLow voltagePower demandPrototypesVoltageCMOS technologyBrain modelingAnalog integrated circuitsSub-threshold designEEGLow powerDDAHigh CMRRA sub-µW intracranial EEG integrated preamplifierPreprintinfo:eu-repo/semantics/preprintinfo:eu-repo/semantics/submittedVersionreponame:COLIBRIinstname:Universidad de la Repúblicainstacron:Universidad de la RepúblicaCabrera, CarolinaOreggioni, JuliánElectrónicaMicroelectrónicaLICENSElicense.txtlicense.txttext/plain; charset=utf-84267http://localhost:8080/xmlui/bitstream/20.500.12008/34945/5/license.txt6429389a7df7277b72b7924fdc7d47a9MD55CC-LICENSElicense_urllicense_urltext/plain; charset=utf-850http://localhost:8080/xmlui/bitstream/20.500.12008/34945/2/license_urla006180e3f5b2ad0b88185d14284c0e0MD52license_textlicense_texttext/html; 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- Universidad de la Repúblicafalse |
| spellingShingle | A sub-µW intracranial EEG integrated preamplifier Cabrera, Carolina Semiconductor device modeling Low voltage Power demand Prototypes Voltage CMOS technology Brain modeling Analog integrated circuits Sub-threshold design EEG Low power DDA High CMRR |
| status_str | submittedVersion |
| title | A sub-µW intracranial EEG integrated preamplifier |
| title_full | A sub-µW intracranial EEG integrated preamplifier |
| title_fullStr | A sub-µW intracranial EEG integrated preamplifier |
| title_full_unstemmed | A sub-µW intracranial EEG integrated preamplifier |
| title_short | A sub-µW intracranial EEG integrated preamplifier |
| title_sort | A sub-µW intracranial EEG integrated preamplifier |
| topic | Semiconductor device modeling Low voltage Power demand Prototypes Voltage CMOS technology Brain modeling Analog integrated circuits Sub-threshold design EEG Low power DDA High CMRR |
| url | https://ieeexplore.ieee.org/document/9948541 https://hdl.handle.net/20.500.12008/34945 |
