Variability-aware design method for a constant inversion level bias current generator
Resumen:
A model for estimating the dispersion in the output of a MOS-only, constant inversion level, current reference is presented. Based on such model, a design method is introduced that allows to optimize how area is spent in order to minimize the dispersion for a given layout complexity. The model was successfully compared with the measurements of a current source fabricated on a 130-nm CMOS technology and with the simulations of six other designs. The fabricated, ultralow power, current source has an area of 0.032 mm 2 and produces 11.4 nA on average, while all eight measured devices were inside ±2.1% of the average.
2019 | |
Dispersion Semiconductor device modeling Generators MOSFET Design methodology Integrated circuit modeling Current references MOS transistors Mismatch ACM Temperature effects Constant inversion |
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Inglés | |
Universidad de la República | |
COLIBRI | |
https://hdl.handle.net/20.500.12008/23861 | |
Acceso abierto | |
Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
_version_ | 1807522895725854720 |
---|---|
author | Antúnez, Guillermo |
author2 | Siniscalchi, Mariana Silveira, Fernando Rossi, Conrado |
author2_role | author author author |
author_facet | Antúnez, Guillermo Siniscalchi, Mariana Silveira, Fernando Rossi, Conrado |
author_role | author |
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collection | COLIBRI |
dc.contributor.filiacion.none.fl_str_mv | Antúnez Guillermo, Universidad de la República (Uruguay). Facultad de Ingeniería. Siniscalchi Mariana, Universidad de la República (Uruguay). Facultad de Ingeniería. Silveira Fernando, Universidad de la República (Uruguay). Facultad de Ingeniería. Rossi Conrado, Universidad de la República (Uruguay). Facultad de Ingeniería. |
dc.creator.none.fl_str_mv | Antúnez, Guillermo Siniscalchi, Mariana Silveira, Fernando Rossi, Conrado |
dc.date.accessioned.none.fl_str_mv | 2020-05-06T23:22:51Z |
dc.date.available.none.fl_str_mv | 2020-05-06T23:22:51Z |
dc.date.issued.none.fl_str_mv | 2019 |
dc.description.abstract.none.fl_txt_mv | A model for estimating the dispersion in the output of a MOS-only, constant inversion level, current reference is presented. Based on such model, a design method is introduced that allows to optimize how area is spent in order to minimize the dispersion for a given layout complexity. The model was successfully compared with the measurements of a current source fabricated on a 130-nm CMOS technology and with the simulations of six other designs. The fabricated, ultralow power, current source has an area of 0.032 mm 2 and produces 11.4 nA on average, while all eight measured devices were inside ±2.1% of the average. |
dc.description.es.fl_txt_mv | Publicado en IEEE Transactions on Circuits and Systems I : Regular Papers , Volume 66, Number 6, page 2027--2036- Jun. 2019 |
dc.format.extent.es.fl_str_mv | 10 p. |
dc.format.mimetype.es.fl_str_mv | application/pdf |
dc.identifier.citation.es.fl_str_mv | Antúnez, G., Siniscalchi, M., Silveira, F. y otros.Variability-aware design method for a constant inversion level bias current generator [Preprint]. Publicado en: IEEE Transactions on Circuits and Systems I : Regular Papers, Vol.66, Num.6, Jun. 2019. DOI: 10.1109/TCSI.2019.2897090 |
dc.identifier.uri.none.fl_str_mv | https://hdl.handle.net/20.500.12008/23861 |
dc.language.iso.none.fl_str_mv | en eng |
dc.rights.license.none.fl_str_mv | Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
dc.rights.none.fl_str_mv | info:eu-repo/semantics/openAccess |
dc.source.none.fl_str_mv | reponame:COLIBRI instname:Universidad de la República instacron:Universidad de la República |
dc.subject.es.fl_str_mv | Dispersion Semiconductor device modeling Generators MOSFET Design methodology Integrated circuit modeling Current references MOS transistors Mismatch ACM Temperature effects Constant inversion |
dc.title.none.fl_str_mv | Variability-aware design method for a constant inversion level bias current generator |
dc.type.es.fl_str_mv | Preprint |
dc.type.none.fl_str_mv | info:eu-repo/semantics/preprint |
dc.type.version.none.fl_str_mv | info:eu-repo/semantics/submittedVersion |
description | Publicado en IEEE Transactions on Circuits and Systems I : Regular Papers , Volume 66, Number 6, page 2027--2036- Jun. 2019 |
eu_rights_str_mv | openAccess |
format | preprint |
id | COLIBRI_704002f90a32b95b459ede45af9f2b83 |
identifier_str_mv | Antúnez, G., Siniscalchi, M., Silveira, F. y otros.Variability-aware design method for a constant inversion level bias current generator [Preprint]. Publicado en: IEEE Transactions on Circuits and Systems I : Regular Papers, Vol.66, Num.6, Jun. 2019. DOI: 10.1109/TCSI.2019.2897090 |
instacron_str | Universidad de la República |
institution | Universidad de la República |
instname_str | Universidad de la República |
language | eng |
language_invalid_str_mv | en |
network_acronym_str | COLIBRI |
network_name_str | COLIBRI |
oai_identifier_str | oai:colibri.udelar.edu.uy:20.500.12008/23859 |
publishDate | 2019 |
reponame_str | COLIBRI |
repository.mail.fl_str_mv | mabel.seroubian@seciu.edu.uy |
repository.name.fl_str_mv | COLIBRI - Universidad de la República |
repository_id_str | 4771 |
rights_invalid_str_mv | Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
spelling | Antúnez Guillermo, Universidad de la República (Uruguay). Facultad de Ingeniería.Siniscalchi Mariana, Universidad de la República (Uruguay). Facultad de Ingeniería.Silveira Fernando, Universidad de la República (Uruguay). Facultad de Ingeniería.Rossi Conrado, Universidad de la República (Uruguay). Facultad de Ingeniería.2020-05-06T23:22:51Z2020-05-06T23:22:51Z2019Antúnez, G., Siniscalchi, M., Silveira, F. y otros.Variability-aware design method for a constant inversion level bias current generator [Preprint]. Publicado en: IEEE Transactions on Circuits and Systems I : Regular Papers, Vol.66, Num.6, Jun. 2019. DOI: 10.1109/TCSI.2019.2897090https://hdl.handle.net/20.500.12008/23861Publicado en IEEE Transactions on Circuits and Systems I : Regular Papers , Volume 66, Number 6, page 2027--2036- Jun. 2019A model for estimating the dispersion in the output of a MOS-only, constant inversion level, current reference is presented. Based on such model, a design method is introduced that allows to optimize how area is spent in order to minimize the dispersion for a given layout complexity. The model was successfully compared with the measurements of a current source fabricated on a 130-nm CMOS technology and with the simulations of six other designs. The fabricated, ultralow power, current source has an area of 0.032 mm 2 and produces 11.4 nA on average, while all eight measured devices were inside ±2.1% of the average.Submitted by Ribeiro Jorge (jribeiro@fing.edu.uy) on 2020-05-06T19:47:07Z No. of bitstreams: 2 license_rdf: 23149 bytes, checksum: 1996b8461bc290aef6a27d78c67b6b52 (MD5) ASSR19.pdf: 909874 bytes, checksum: 633f0d747bc3f12ce45794683bf52c4b (MD5)Approved for entry into archive by Machado Jimena (jmachado@fing.edu.uy) on 2020-05-06T22:21:53Z (GMT) No. of bitstreams: 2 license_rdf: 23149 bytes, checksum: 1996b8461bc290aef6a27d78c67b6b52 (MD5) ASSR19.pdf: 909874 bytes, checksum: 633f0d747bc3f12ce45794683bf52c4b (MD5)Made available in DSpace by Luna Fabiana (fabiana.luna@fic.edu.uy) on 2020-05-06T23:22:51Z (GMT). No. of bitstreams: 2 license_rdf: 23149 bytes, checksum: 1996b8461bc290aef6a27d78c67b6b52 (MD5) ASSR19.pdf: 909874 bytes, checksum: 633f0d747bc3f12ce45794683bf52c4b (MD5) Previous issue date: 201910 p.application/pdfenengLas obras depositadas en el Repositorio se rigen por la Ordenanza de los Derechos de la Propiedad Intelectual de la Universidad de la República.(Res. Nº 91 de C.D.C. de 8/III/1994 – D.O. 7/IV/1994) y por la Ordenanza del Repositorio Abierto de la Universidad de la República (Res. Nº 16 de C.D.C. de 07/10/2014)info:eu-repo/semantics/openAccessLicencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)DispersionSemiconductor device modelingGeneratorsMOSFETDesign methodologyIntegrated circuit modelingCurrent referencesMOS transistorsMismatchACMTemperature effectsConstant inversionVariability-aware design method for a constant inversion level bias current generatorPreprintinfo:eu-repo/semantics/preprintinfo:eu-repo/semantics/submittedVersionreponame:COLIBRIinstname:Universidad de la Repúblicainstacron:Universidad de la RepúblicaAntúnez, GuillermoSiniscalchi, MarianaSilveira, FernandoRossi, ConradoElectrónicaMicroelectrónicaLICENSElicense.txtlicense.txttext/plain; charset=utf-84267http://localhost:8080/xmlui/bitstream/20.500.12008/23859/5/license.txt6429389a7df7277b72b7924fdc7d47a9MD55CC-LICENSElicense_urllicense_urltext/plain; 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- Universidad de la Repúblicafalse |
spellingShingle | Variability-aware design method for a constant inversion level bias current generator Antúnez, Guillermo Dispersion Semiconductor device modeling Generators MOSFET Design methodology Integrated circuit modeling Current references MOS transistors Mismatch ACM Temperature effects Constant inversion |
status_str | submittedVersion |
title | Variability-aware design method for a constant inversion level bias current generator |
title_full | Variability-aware design method for a constant inversion level bias current generator |
title_fullStr | Variability-aware design method for a constant inversion level bias current generator |
title_full_unstemmed | Variability-aware design method for a constant inversion level bias current generator |
title_short | Variability-aware design method for a constant inversion level bias current generator |
title_sort | Variability-aware design method for a constant inversion level bias current generator |
topic | Dispersion Semiconductor device modeling Generators MOSFET Design methodology Integrated circuit modeling Current references MOS transistors Mismatch ACM Temperature effects Constant inversion |
url | https://hdl.handle.net/20.500.12008/23861 |