Very low power microprocessor cell : design, fabrication and test
Resumen:
We describe the development and test of a microprocessor cell intended for very low power applications. A novel design methodology using a VHDL simulation based consumption estimation tool was followed. The microprocessor cell was successfully tested exhibiting a low power consumption as intended. The strong correlation between measurements and simulation validates the chosen design methodology.
| 2007 | |
| Electrónica | |
| Inglés | |
| Universidad de la República | |
| COLIBRI | |
| https://hdl.handle.net/20.500.12008/38769 | |
| Acceso abierto | |
| Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
