Ultra High Voltage IC design with a 400V CMOS technology: a dimmer application
Supervisor(es): Arnaud Maceira, Alfredo - Gak Szollosy, Joel
Resumen:
The advent of Ultra High Voltage (UHV) technologies for integrated circuit fabrication opens up new possibilities for the design of circuits that connect directly to the power distribution network, with applications in the design of compact power sources, domotics, smart-grids, etc. This project proposes the design, fabrication and characterization of circuits in an UHV technology, of which a fully integrated two terminal phase-cut dimmer was chosen as an example. At the time of writing this thesis, no commercially available integrated circuit exists that fully implements a phase cut dimmer, and no academic papers could be found referencing similar circuits. The circuit was designed on a 1µm UHV MOS technology in a silicon-on-insulator (SOI) wafer (XDM10 from XFAB). The dimmer can operate with a duty cycle of up to 95% power (80% time) and a load of up to 100W which is adequate for modern domestic dimmable LED lights. The total occupied silicon area is 6.5mm2 without pads. Because of technological limitations, the final version of the dimmer is almost fully integrated. Two low voltage capacitors and four UHV diodes are outside the ASIC.
Con la popularización de tecnologías de fabricación de circuitos integrados de ultra alto voltaje (UHV), surge la posibilidad de diseñar circuitos integrados conectados directamente a la red de distribución, con aplicaciones en fuentes compactas, domótica, smart-grids, entre otras. Este proyecto propone el diseño, fabricación y caracterización de circuitos en tecnología UHV. Se toma como ejemplo un atenuador por corte de fase de dos terminales. Al momento de escribir esta tesis, no existen circuitos integrados comerciales que implementan un atenuador por corte de fase completo, ni se pudo encontrar artículos académicos haciendo referencia a dispositivos similares. El circuito fue diseñado en una tecnología de 1µm UHV MOS (XDM10 de XFAB) en una oblea de silicio sobre aislante (SOI). Puede operar con un ciclo de trabajo hasta 95% de potencia (80% en tiempo) y una carga de hasta 100W, lo que es adecuado para lámparas atenuables de LED. El área total de silicio ocupada es de 6.5mm2 sin contar pads. Debido a limitaciones tecnológicas, la versión final del atenuador es casi completamente integrada. Dos capacitores de bajo voltaje y cuatro diodos UHV quedan por fuera del ASIC.
2020 | |
Circuitos integrados Ultra alto voltaje Electrónica de bajo consumo |
|
Inglés | |
Universidad Católica del Uruguay | |
LIBERI | |
https://hdl.handle.net/10895/1428 | |
Acceso abierto |
_version_ | 1815178689790345216 |
---|---|
author | Torres Álvarez, Fabián |
author_facet | Torres Álvarez, Fabián |
author_role | author |
bitstream.checksum.fl_str_mv | a6e19909d54dd6edbe29babc8394b1ed a6e19909d54dd6edbe29babc8394b1ed f728d7a422ff30afb07f137ef2432899 f728d7a422ff30afb07f137ef2432899 c1ec457ea27e8080f892477b49a018e3 8a4605be74aa9ea9d79846c1fba20a33 |
bitstream.checksumAlgorithm.fl_str_mv | MD5 MD5 MD5 MD5 MD5 MD5 |
bitstream.url.fl_str_mv | http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1428/3/master_thesis_torres_fabian_v06.pdf.txt http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1428/5/Torres2020.pdf.txt http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1428/4/master_thesis_torres_fabian_v06.pdf.jpg http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1428/6/Torres2020.pdf.jpg http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1428/1/Torres2020.pdf http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1428/2/license.txt |
collection | LIBERI |
dc.creator.advisor.none.fl_str_mv | Arnaud Maceira, Alfredo Gak Szollosy, Joel |
dc.creator.none.fl_str_mv | Torres Álvarez, Fabián |
dc.date.accessioned.none.fl_str_mv | 2020-06-24T14:46:11Z |
dc.date.available.none.fl_str_mv | 2020-06-24T14:46:11Z |
dc.date.issued.none.fl_str_mv | 2020-06-23 |
dc.description.abstract.none.fl_txt_mv | The advent of Ultra High Voltage (UHV) technologies for integrated circuit fabrication opens up new possibilities for the design of circuits that connect directly to the power distribution network, with applications in the design of compact power sources, domotics, smart-grids, etc. This project proposes the design, fabrication and characterization of circuits in an UHV technology, of which a fully integrated two terminal phase-cut dimmer was chosen as an example. At the time of writing this thesis, no commercially available integrated circuit exists that fully implements a phase cut dimmer, and no academic papers could be found referencing similar circuits. The circuit was designed on a 1µm UHV MOS technology in a silicon-on-insulator (SOI) wafer (XDM10 from XFAB). The dimmer can operate with a duty cycle of up to 95% power (80% time) and a load of up to 100W which is adequate for modern domestic dimmable LED lights. The total occupied silicon area is 6.5mm2 without pads. Because of technological limitations, the final version of the dimmer is almost fully integrated. Two low voltage capacitors and four UHV diodes are outside the ASIC. Con la popularización de tecnologías de fabricación de circuitos integrados de ultra alto voltaje (UHV), surge la posibilidad de diseñar circuitos integrados conectados directamente a la red de distribución, con aplicaciones en fuentes compactas, domótica, smart-grids, entre otras. Este proyecto propone el diseño, fabricación y caracterización de circuitos en tecnología UHV. Se toma como ejemplo un atenuador por corte de fase de dos terminales. Al momento de escribir esta tesis, no existen circuitos integrados comerciales que implementan un atenuador por corte de fase completo, ni se pudo encontrar artículos académicos haciendo referencia a dispositivos similares. El circuito fue diseñado en una tecnología de 1µm UHV MOS (XDM10 de XFAB) en una oblea de silicio sobre aislante (SOI). Puede operar con un ciclo de trabajo hasta 95% de potencia (80% en tiempo) y una carga de hasta 100W, lo que es adecuado para lámparas atenuables de LED. El área total de silicio ocupada es de 6.5mm2 sin contar pads. Debido a limitaciones tecnológicas, la versión final del atenuador es casi completamente integrada. Dos capacitores de bajo voltaje y cuatro diodos UHV quedan por fuera del ASIC. |
dc.format.extent.es.fl_str_mv | 114 p. |
dc.identifier.uri.none.fl_str_mv | https://hdl.handle.net/10895/1428 |
dc.language.iso.none.fl_str_mv | eng |
dc.publisher.es.fl_str_mv | Universidad Católica del Uruguay |
dc.rights.none.fl_str_mv | info:eu-repo/semantics/openAccess |
dc.source.none.fl_str_mv | reponame:LIBERI instname:Universidad Católica del Uruguay instacron:Universidad Católica del Uruguay |
dc.subject.es.fl_str_mv | Circuitos integrados Ultra alto voltaje Electrónica de bajo consumo |
dc.title.none.fl_str_mv | Ultra High Voltage IC design with a 400V CMOS technology: a dimmer application |
dc.type.es.fl_str_mv | Tesis de maestría |
dc.type.none.fl_str_mv | info:eu-repo/semantics/masterThesis |
dc.type.version.none.fl_str_mv | info:eu-repo/semantics/acceptedVersion |
description | The advent of Ultra High Voltage (UHV) technologies for integrated circuit fabrication opens up new possibilities for the design of circuits that connect directly to the power distribution network, with applications in the design of compact power sources, domotics, smart-grids, etc. This project proposes the design, fabrication and characterization of circuits in an UHV technology, of which a fully integrated two terminal phase-cut dimmer was chosen as an example. At the time of writing this thesis, no commercially available integrated circuit exists that fully implements a phase cut dimmer, and no academic papers could be found referencing similar circuits. The circuit was designed on a 1µm UHV MOS technology in a silicon-on-insulator (SOI) wafer (XDM10 from XFAB). The dimmer can operate with a duty cycle of up to 95% power (80% time) and a load of up to 100W which is adequate for modern domestic dimmable LED lights. The total occupied silicon area is 6.5mm2 without pads. Because of technological limitations, the final version of the dimmer is almost fully integrated. Two low voltage capacitors and four UHV diodes are outside the ASIC. |
eu_rights_str_mv | openAccess |
format | masterThesis |
id | LIBERI_86d3d4de756757a3cee6c3b464cda4f5 |
instacron_str | Universidad Católica del Uruguay |
institution | Universidad Católica del Uruguay |
instname_str | Universidad Católica del Uruguay |
language | eng |
network_acronym_str | LIBERI |
network_name_str | LIBERI |
oai_identifier_str | oai:liberi.ucu.edu.uy:10895/1428 |
publishDate | 2020 |
reponame_str | LIBERI |
repository.mail.fl_str_mv | franco.pertusso@ucu.edu.uy |
repository.name.fl_str_mv | LIBERI - Universidad Católica del Uruguay |
repository_id_str | 10342 |
spelling | 2020-06-24T14:46:11Z2020-06-24T14:46:11Z2020-06-23https://hdl.handle.net/10895/1428The advent of Ultra High Voltage (UHV) technologies for integrated circuit fabrication opens up new possibilities for the design of circuits that connect directly to the power distribution network, with applications in the design of compact power sources, domotics, smart-grids, etc. This project proposes the design, fabrication and characterization of circuits in an UHV technology, of which a fully integrated two terminal phase-cut dimmer was chosen as an example. At the time of writing this thesis, no commercially available integrated circuit exists that fully implements a phase cut dimmer, and no academic papers could be found referencing similar circuits. The circuit was designed on a 1µm UHV MOS technology in a silicon-on-insulator (SOI) wafer (XDM10 from XFAB). The dimmer can operate with a duty cycle of up to 95% power (80% time) and a load of up to 100W which is adequate for modern domestic dimmable LED lights. The total occupied silicon area is 6.5mm2 without pads. Because of technological limitations, the final version of the dimmer is almost fully integrated. Two low voltage capacitors and four UHV diodes are outside the ASIC.Con la popularización de tecnologías de fabricación de circuitos integrados de ultra alto voltaje (UHV), surge la posibilidad de diseñar circuitos integrados conectados directamente a la red de distribución, con aplicaciones en fuentes compactas, domótica, smart-grids, entre otras. Este proyecto propone el diseño, fabricación y caracterización de circuitos en tecnología UHV. Se toma como ejemplo un atenuador por corte de fase de dos terminales. Al momento de escribir esta tesis, no existen circuitos integrados comerciales que implementan un atenuador por corte de fase completo, ni se pudo encontrar artículos académicos haciendo referencia a dispositivos similares. El circuito fue diseñado en una tecnología de 1µm UHV MOS (XDM10 de XFAB) en una oblea de silicio sobre aislante (SOI). Puede operar con un ciclo de trabajo hasta 95% de potencia (80% en tiempo) y una carga de hasta 100W, lo que es adecuado para lámparas atenuables de LED. El área total de silicio ocupada es de 6.5mm2 sin contar pads. Debido a limitaciones tecnológicas, la versión final del atenuador es casi completamente integrada. Dos capacitores de bajo voltaje y cuatro diodos UHV quedan por fuera del ASIC.114 p.Universidad Católica del UruguayCircuitos integradosUltra alto voltajeElectrónica de bajo consumoUltra High Voltage IC design with a 400V CMOS technology: a dimmer applicationTesis de maestríainfo:eu-repo/semantics/masterThesisinfo:eu-repo/semantics/acceptedVersionreponame:LIBERIinstname:Universidad Católica del Uruguayinstacron:Universidad Católica del UruguayTorres Álvarez, FabiánArnaud Maceira, AlfredoGak Szollosy, Joelenginfo:eu-repo/semantics/openAccessTEXTmaster_thesis_torres_fabian_v06.pdf.txtmaster_thesis_torres_fabian_v06.pdf.txtExtracted texttext/plain130061http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1428/3/master_thesis_torres_fabian_v06.pdf.txta6e19909d54dd6edbe29babc8394b1edMD53Torres2020.pdf.txtTorres2020.pdf.txtExtracted texttext/plain130061http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1428/5/Torres2020.pdf.txta6e19909d54dd6edbe29babc8394b1edMD55THUMBNAILmaster_thesis_torres_fabian_v06.pdf.jpgmaster_thesis_torres_fabian_v06.pdf.jpgGenerated Thumbnailimage/jpeg3658http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1428/4/master_thesis_torres_fabian_v06.pdf.jpgf728d7a422ff30afb07f137ef2432899MD54Torres2020.pdf.jpgTorres2020.pdf.jpgGenerated Thumbnailimage/jpeg3658http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1428/6/Torres2020.pdf.jpgf728d7a422ff30afb07f137ef2432899MD56ORIGINALTorres2020.pdfTorres2020.pdfapplication/pdf3339050http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1428/1/Torres2020.pdfc1ec457ea27e8080f892477b49a018e3MD51LICENSElicense.txtlicense.txttext/plain; charset=utf-81748http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1428/2/license.txt8a4605be74aa9ea9d79846c1fba20a33MD5210895/14282022-08-26 14:44:40.045oai:liberi.ucu.edu.uy:10895/1428Tk9URTogUExBQ0UgWU9VUiBPV04gTElDRU5TRSBIRVJFClRoaXMgc2FtcGxlIGxpY2Vuc2UgaXMgcHJvdmlkZWQgZm9yIGluZm9ybWF0aW9uYWwgcHVycG9zZXMgb25seS4KCk5PTi1FWENMVVNJVkUgRElTVFJJQlVUSU9OIExJQ0VOU0UKCkJ5IHNpZ25pbmcgYW5kIHN1Ym1pdHRpbmcgdGhpcyBsaWNlbnNlLCB5b3UgKHRoZSBhdXRob3Iocykgb3IgY29weXJpZ2h0Cm93bmVyKSBncmFudHMgdG8gRFNwYWNlIFVuaXZlcnNpdHkgKERTVSkgdGhlIG5vbi1leGNsdXNpdmUgcmlnaHQgdG8gcmVwcm9kdWNlLAp0cmFuc2xhdGUgKGFzIGRlZmluZWQgYmVsb3cpLCBhbmQvb3IgZGlzdHJpYnV0ZSB5b3VyIHN1Ym1pc3Npb24gKGluY2x1ZGluZwp0aGUgYWJzdHJhY3QpIHdvcmxkd2lkZSBpbiBwcmludCBhbmQgZWxlY3Ryb25pYyBmb3JtYXQgYW5kIGluIGFueSBtZWRpdW0sCmluY2x1ZGluZyBidXQgbm90IGxpbWl0ZWQgdG8gYXVkaW8gb3IgdmlkZW8uCgpZb3UgYWdyZWUgdGhhdCBEU1UgbWF5LCB3aXRob3V0IGNoYW5naW5nIHRoZSBjb250ZW50LCB0cmFuc2xhdGUgdGhlCnN1Ym1pc3Npb24gdG8gYW55IG1lZGl1bSBvciBmb3JtYXQgZm9yIHRoZSBwdXJwb3NlIG9mIHByZXNlcnZhdGlvbi4KCllvdSBhbHNvIGFncmVlIHRoYXQgRFNVIG1heSBrZWVwIG1vcmUgdGhhbiBvbmUgY29weSBvZiB0aGlzIHN1Ym1pc3Npb24gZm9yCnB1cnBvc2VzIG9mIHNlY3VyaXR5LCBiYWNrLXVwIGFuZCBwcmVzZXJ2YXRpb24uCgpZb3UgcmVwcmVzZW50IHRoYXQgdGhlIHN1Ym1pc3Npb24gaXMgeW91ciBvcmlnaW5hbCB3b3JrLCBhbmQgdGhhdCB5b3UgaGF2ZQp0aGUgcmlnaHQgdG8gZ3JhbnQgdGhlIHJpZ2h0cyBjb250YWluZWQgaW4gdGhpcyBsaWNlbnNlLiBZb3UgYWxzbyByZXByZXNlbnQKdGhhdCB5b3VyIHN1Ym1pc3Npb24gZG9lcyBub3QsIHRvIHRoZSBiZXN0IG9mIHlvdXIga25vd2xlZGdlLCBpbmZyaW5nZSB1cG9uCmFueW9uZSdzIGNvcHlyaWdodC4KCklmIHRoZSBzdWJtaXNzaW9uIGNvbnRhaW5zIG1hdGVyaWFsIGZvciB3aGljaCB5b3UgZG8gbm90IGhvbGQgY29weXJpZ2h0LAp5b3UgcmVwcmVzZW50IHRoYXQgeW91IGhhdmUgb2J0YWluZWQgdGhlIHVucmVzdHJpY3RlZCBwZXJtaXNzaW9uIG9mIHRoZQpjb3B5cmlnaHQgb3duZXIgdG8gZ3JhbnQgRFNVIHRoZSByaWdodHMgcmVxdWlyZWQgYnkgdGhpcyBsaWNlbnNlLCBhbmQgdGhhdApzdWNoIHRoaXJkLXBhcnR5IG93bmVkIG1hdGVyaWFsIGlzIGNsZWFybHkgaWRlbnRpZmllZCBhbmQgYWNrbm93bGVkZ2VkCndpdGhpbiB0aGUgdGV4dCBvciBjb250ZW50IG9mIHRoZSBzdWJtaXNzaW9uLgoKSUYgVEhFIFNVQk1JU1NJT04gSVMgQkFTRUQgVVBPTiBXT1JLIFRIQVQgSEFTIEJFRU4gU1BPTlNPUkVEIE9SIFNVUFBPUlRFRApCWSBBTiBBR0VOQ1kgT1IgT1JHQU5JWkFUSU9OIE9USEVSIFRIQU4gRFNVLCBZT1UgUkVQUkVTRU5UIFRIQVQgWU9VIEhBVkUKRlVMRklMTEVEIEFOWSBSSUdIVCBPRiBSRVZJRVcgT1IgT1RIRVIgT0JMSUdBVElPTlMgUkVRVUlSRUQgQlkgU1VDSApDT05UUkFDVCBPUiBBR1JFRU1FTlQuCgpEU1Ugd2lsbCBjbGVhcmx5IGlkZW50aWZ5IHlvdXIgbmFtZShzKSBhcyB0aGUgYXV0aG9yKHMpIG9yIG93bmVyKHMpIG9mIHRoZQpzdWJtaXNzaW9uLCBhbmQgd2lsbCBub3QgbWFrZSBhbnkgYWx0ZXJhdGlvbiwgb3RoZXIgdGhhbiBhcyBhbGxvd2VkIGJ5IHRoaXMKbGljZW5zZSwgdG8geW91ciBzdWJtaXNzaW9uLgo=Universidadhttps://www.ucu.edu.uy/https://liberi.ucu.edu.uy/oai/requestfranco.pertusso@ucu.edu.uyUruguayopendoar:103422022-08-26T17:44:40LIBERI - Universidad Católica del Uruguayfalse |
spellingShingle | Ultra High Voltage IC design with a 400V CMOS technology: a dimmer application Torres Álvarez, Fabián Circuitos integrados Ultra alto voltaje Electrónica de bajo consumo |
status_str | acceptedVersion |
title | Ultra High Voltage IC design with a 400V CMOS technology: a dimmer application |
title_full | Ultra High Voltage IC design with a 400V CMOS technology: a dimmer application |
title_fullStr | Ultra High Voltage IC design with a 400V CMOS technology: a dimmer application |
title_full_unstemmed | Ultra High Voltage IC design with a 400V CMOS technology: a dimmer application |
title_short | Ultra High Voltage IC design with a 400V CMOS technology: a dimmer application |
title_sort | Ultra High Voltage IC design with a 400V CMOS technology: a dimmer application |
topic | Circuitos integrados Ultra alto voltaje Electrónica de bajo consumo |
url | https://hdl.handle.net/10895/1428 |