An affordable post-silicon testing framework applied to a RISC-V based microcontroller
Resumen:
The RISC-V architecture is a very attractive option for developing application specific systems needing an affordable yet efficient central processing unit. Post-silicon validation on RISC-V applications has been done in industry for a while, however documentation is scarce. This paper proposes a practical low-cost post-silicon testing framework applied to a RISC-V RV32I based microcontroller. The framework uses FPGA-based emulation as a cornerstone to test the microcontroller before and after its fabrication. The platform only requires a handful of elements like the FPGA, a PC, the fabricated chip and some discrete components, without losing the capacity to functionally validate the design under test and save development testing time by using a re-utilize philosophy.
| 2021 | |
| Agencia Nacional de Investigación e Innovación | |
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Post-silicon validation Testing FPGA RISC-V Microcontroller EDA tools Architecture Test generation I/O protocols SPI Testing-plataforms |
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| Inglés | |
| Universidad Católica del Uruguay | |
| LIBERI | |
| https://hdl.handle.net/10895/1551 | |
| Acceso abierto | |
| Licencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC BY-NC-ND 4.0) |
