An affordable post-silicon testing framework applied to a RISC-V based microcontroller
Resumen:
The RISC-V architecture is a very attractive option for developing application specific systems needing an affordable yet efficient central processing unit. Post-silicon validation on RISC-V applications has been done in industry for a while, however documentation is scarce. This paper proposes a practical low-cost post-silicon testing framework applied to a RISC-V RV32I based microcontroller. The framework uses FPGA-based emulation as a cornerstone to test the microcontroller before and after its fabrication. The platform only requires a handful of elements like the FPGA, a PC, the fabricated chip and some discrete components, without losing the capacity to functionally validate the design under test and save development testing time by using a re-utilize philosophy.
| 2021 | |
| Agencia Nacional de Investigación e Innovación | |
|
Post-silicon validation Testing FPGA RISC-V Microcontroller EDA tools Architecture Test generation I/O protocols SPI Testing-plataforms |
|
| Inglés | |
| Universidad Católica del Uruguay | |
| LIBERI | |
| https://hdl.handle.net/10895/1551 | |
| Acceso abierto | |
| Licencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC BY-NC-ND 4.0) |
| _version_ | 1815178684175220736 |
|---|---|
| author | Molina Robles, Roberto |
| author2 | García Ramírez, Ronny Chacón Rodríguez, Alfonso Rimolo Donadio, Renato Arnaud Maceira, Alfredo |
| author2_role | author author author author |
| author_facet | Molina Robles, Roberto García Ramírez, Ronny Chacón Rodríguez, Alfonso Rimolo Donadio, Renato Arnaud Maceira, Alfredo |
| author_role | author |
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| bitstream.checksumAlgorithm.fl_str_mv | MD5 MD5 MD5 MD5 |
| bitstream.url.fl_str_mv | http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1551/1/An_affordable_post-silicon_testing_framework_applied_to_a_RISC-V_based_microcontroller%20%281%29.pdf http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1551/2/license.txt http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1551/3/An_affordable_post-silicon_testing_framework_applied_to_a_RISC-V_based_microcontroller%20%281%29.pdf.txt http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1551/4/An_affordable_post-silicon_testing_framework_applied_to_a_RISC-V_based_microcontroller%20%281%29.pdf.jpg |
| collection | LIBERI |
| dc.creator.none.fl_str_mv | Molina Robles, Roberto García Ramírez, Ronny Chacón Rodríguez, Alfonso Rimolo Donadio, Renato Arnaud Maceira, Alfredo |
| dc.date.accessioned.none.fl_str_mv | 2021-10-21T20:27:37Z |
| dc.date.available.none.fl_str_mv | 2021-10-21T20:27:37Z |
| dc.date.issued.none.fl_str_mv | 2021-04 |
| dc.description.abstract.none.fl_txt_mv | The RISC-V architecture is a very attractive option for developing application specific systems needing an affordable yet efficient central processing unit. Post-silicon validation on RISC-V applications has been done in industry for a while, however documentation is scarce. This paper proposes a practical low-cost post-silicon testing framework applied to a RISC-V RV32I based microcontroller. The framework uses FPGA-based emulation as a cornerstone to test the microcontroller before and after its fabrication. The platform only requires a handful of elements like the FPGA, a PC, the fabricated chip and some discrete components, without losing the capacity to functionally validate the design under test and save development testing time by using a re-utilize philosophy. |
| dc.description.sponsorship.none.fl_txt_mv | Agencia Nacional de Investigación e Innovación |
| dc.format.mimetype.none.fl_str_mv | application/pdf |
| dc.identifier.uri.none.fl_str_mv | https://hdl.handle.net/10895/1551 |
| dc.language.iso.none.fl_str_mv | eng |
| dc.publisher.es.fl_str_mv | IEEE |
| dc.relation.ispartof.none.fl_str_mv | IEEE Latin America Electron Devices Conference, (LAEDC), 2021. |
| dc.rights.license.none.fl_str_mv | Licencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC BY-NC-ND 4.0) |
| dc.rights.none.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.source.none.fl_str_mv | reponame:LIBERI instname:Universidad Católica del Uruguay instacron:Universidad Católica del Uruguay |
| dc.subject.es.fl_str_mv | Post-silicon validation Testing FPGA RISC-V Microcontroller EDA tools Architecture Test generation I/O protocols SPI Testing-plataforms |
| dc.title.none.fl_str_mv | An affordable post-silicon testing framework applied to a RISC-V based microcontroller |
| dc.type.es.fl_str_mv | Artículo |
| dc.type.none.fl_str_mv | info:eu-repo/semantics/article |
| dc.type.version.none.fl_str_mv | info:eu-repo/semantics/publishedVersion |
| description | The RISC-V architecture is a very attractive option for developing application specific systems needing an affordable yet efficient central processing unit. Post-silicon validation on RISC-V applications has been done in industry for a while, however documentation is scarce. This paper proposes a practical low-cost post-silicon testing framework applied to a RISC-V RV32I based microcontroller. The framework uses FPGA-based emulation as a cornerstone to test the microcontroller before and after its fabrication. The platform only requires a handful of elements like the FPGA, a PC, the fabricated chip and some discrete components, without losing the capacity to functionally validate the design under test and save development testing time by using a re-utilize philosophy. |
| eu_rights_str_mv | openAccess |
| format | article |
| id | LIBERI_18e6b04d82f682b02f27a41832bfb5aa |
| instacron_str | Universidad Católica del Uruguay |
| institution | Universidad Católica del Uruguay |
| instname_str | Universidad Católica del Uruguay |
| language | eng |
| network_acronym_str | LIBERI |
| network_name_str | LIBERI |
| oai_identifier_str | oai:liberi.ucu.edu.uy:10895/1551 |
| publishDate | 2021 |
| reponame_str | LIBERI |
| repository.mail.fl_str_mv | franco.pertusso@ucu.edu.uy |
| repository.name.fl_str_mv | LIBERI - Universidad Católica del Uruguay |
| repository_id_str | 10342 |
| rights_invalid_str_mv | Licencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC BY-NC-ND 4.0) |
| spelling | Licencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC BY-NC-ND 4.0)info:eu-repo/semantics/openAccess2021-10-21T20:27:37Z2021-10-21T20:27:37Z2021-04https://hdl.handle.net/10895/1551The RISC-V architecture is a very attractive option for developing application specific systems needing an affordable yet efficient central processing unit. Post-silicon validation on RISC-V applications has been done in industry for a while, however documentation is scarce. This paper proposes a practical low-cost post-silicon testing framework applied to a RISC-V RV32I based microcontroller. The framework uses FPGA-based emulation as a cornerstone to test the microcontroller before and after its fabrication. The platform only requires a handful of elements like the FPGA, a PC, the fabricated chip and some discrete components, without losing the capacity to functionally validate the design under test and save development testing time by using a re-utilize philosophy.Agencia Nacional de Investigación e Innovaciónapplication/pdfIEEEIEEE Latin America Electron Devices Conference, (LAEDC), 2021.Post-silicon validationTestingFPGARISC-VMicrocontrollerEDA toolsArchitectureTest generationI/O protocolsSPITesting-plataformsAn affordable post-silicon testing framework applied to a RISC-V based microcontrollerArtículoinfo:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionreponame:LIBERIinstname:Universidad Católica del Uruguayinstacron:Universidad Católica del UruguayMolina Robles, RobertoGarcía Ramírez, RonnyChacón Rodríguez, AlfonsoRimolo Donadio, RenatoArnaud Maceira, AlfredoengORIGINALAn_affordable_post-silicon_testing_framework_applied_to_a_RISC-V_based_microcontroller (1).pdfAn_affordable_post-silicon_testing_framework_applied_to_a_RISC-V_based_microcontroller (1).pdfapplication/pdf3209413http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1551/1/An_affordable_post-silicon_testing_framework_applied_to_a_RISC-V_based_microcontroller%20%281%29.pdfb75383f12555a140d6a0a099834cf683MD51LICENSElicense.txtlicense.txttext/plain; charset=utf-81748http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1551/2/license.txt8a4605be74aa9ea9d79846c1fba20a33MD52TEXTAn_affordable_post-silicon_testing_framework_applied_to_a_RISC-V_based_microcontroller (1).pdf.txtAn_affordable_post-silicon_testing_framework_applied_to_a_RISC-V_based_microcontroller (1).pdf.txtExtracted texttext/plain25025http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1551/3/An_affordable_post-silicon_testing_framework_applied_to_a_RISC-V_based_microcontroller%20%281%29.pdf.txt44bffed906197547469a07be686f2f00MD53THUMBNAILAn_affordable_post-silicon_testing_framework_applied_to_a_RISC-V_based_microcontroller (1).pdf.jpgAn_affordable_post-silicon_testing_framework_applied_to_a_RISC-V_based_microcontroller (1).pdf.jpgGenerated Thumbnailimage/jpeg7553http://liberi.ucu.edu.uy/xmlui/bitstream/10895/1551/4/An_affordable_post-silicon_testing_framework_applied_to_a_RISC-V_based_microcontroller%20%281%29.pdf.jpg60c41f892a0202e0c210671507f575f9MD5410895/15512021-11-10 18:02:08.269oai:liberi.ucu.edu.uy:10895/1551Tk9URTogUExBQ0UgWU9VUiBPV04gTElDRU5TRSBIRVJFClRoaXMgc2FtcGxlIGxpY2Vuc2UgaXMgcHJvdmlkZWQgZm9yIGluZm9ybWF0aW9uYWwgcHVycG9zZXMgb25seS4KCk5PTi1FWENMVVNJVkUgRElTVFJJQlVUSU9OIExJQ0VOU0UKCkJ5IHNpZ25pbmcgYW5kIHN1Ym1pdHRpbmcgdGhpcyBsaWNlbnNlLCB5b3UgKHRoZSBhdXRob3Iocykgb3IgY29weXJpZ2h0Cm93bmVyKSBncmFudHMgdG8gRFNwYWNlIFVuaXZlcnNpdHkgKERTVSkgdGhlIG5vbi1leGNsdXNpdmUgcmlnaHQgdG8gcmVwcm9kdWNlLAp0cmFuc2xhdGUgKGFzIGRlZmluZWQgYmVsb3cpLCBhbmQvb3IgZGlzdHJpYnV0ZSB5b3VyIHN1Ym1pc3Npb24gKGluY2x1ZGluZwp0aGUgYWJzdHJhY3QpIHdvcmxkd2lkZSBpbiBwcmludCBhbmQgZWxlY3Ryb25pYyBmb3JtYXQgYW5kIGluIGFueSBtZWRpdW0sCmluY2x1ZGluZyBidXQgbm90IGxpbWl0ZWQgdG8gYXVkaW8gb3IgdmlkZW8uCgpZb3UgYWdyZWUgdGhhdCBEU1UgbWF5LCB3aXRob3V0IGNoYW5naW5nIHRoZSBjb250ZW50LCB0cmFuc2xhdGUgdGhlCnN1Ym1pc3Npb24gdG8gYW55IG1lZGl1bSBvciBmb3JtYXQgZm9yIHRoZSBwdXJwb3NlIG9mIHByZXNlcnZhdGlvbi4KCllvdSBhbHNvIGFncmVlIHRoYXQgRFNVIG1heSBrZWVwIG1vcmUgdGhhbiBvbmUgY29weSBvZiB0aGlzIHN1Ym1pc3Npb24gZm9yCnB1cnBvc2VzIG9mIHNlY3VyaXR5LCBiYWNrLXVwIGFuZCBwcmVzZXJ2YXRpb24uCgpZb3UgcmVwcmVzZW50IHRoYXQgdGhlIHN1Ym1pc3Npb24gaXMgeW91ciBvcmlnaW5hbCB3b3JrLCBhbmQgdGhhdCB5b3UgaGF2ZQp0aGUgcmlnaHQgdG8gZ3JhbnQgdGhlIHJpZ2h0cyBjb250YWluZWQgaW4gdGhpcyBsaWNlbnNlLiBZb3UgYWxzbyByZXByZXNlbnQKdGhhdCB5b3VyIHN1Ym1pc3Npb24gZG9lcyBub3QsIHRvIHRoZSBiZXN0IG9mIHlvdXIga25vd2xlZGdlLCBpbmZyaW5nZSB1cG9uCmFueW9uZSdzIGNvcHlyaWdodC4KCklmIHRoZSBzdWJtaXNzaW9uIGNvbnRhaW5zIG1hdGVyaWFsIGZvciB3aGljaCB5b3UgZG8gbm90IGhvbGQgY29weXJpZ2h0LAp5b3UgcmVwcmVzZW50IHRoYXQgeW91IGhhdmUgb2J0YWluZWQgdGhlIHVucmVzdHJpY3RlZCBwZXJtaXNzaW9uIG9mIHRoZQpjb3B5cmlnaHQgb3duZXIgdG8gZ3JhbnQgRFNVIHRoZSByaWdodHMgcmVxdWlyZWQgYnkgdGhpcyBsaWNlbnNlLCBhbmQgdGhhdApzdWNoIHRoaXJkLXBhcnR5IG93bmVkIG1hdGVyaWFsIGlzIGNsZWFybHkgaWRlbnRpZmllZCBhbmQgYWNrbm93bGVkZ2VkCndpdGhpbiB0aGUgdGV4dCBvciBjb250ZW50IG9mIHRoZSBzdWJtaXNzaW9uLgoKSUYgVEhFIFNVQk1JU1NJT04gSVMgQkFTRUQgVVBPTiBXT1JLIFRIQVQgSEFTIEJFRU4gU1BPTlNPUkVEIE9SIFNVUFBPUlRFRApCWSBBTiBBR0VOQ1kgT1IgT1JHQU5JWkFUSU9OIE9USEVSIFRIQU4gRFNVLCBZT1UgUkVQUkVTRU5UIFRIQVQgWU9VIEhBVkUKRlVMRklMTEVEIEFOWSBSSUdIVCBPRiBSRVZJRVcgT1IgT1RIRVIgT0JMSUdBVElPTlMgUkVRVUlSRUQgQlkgU1VDSApDT05UUkFDVCBPUiBBR1JFRU1FTlQuCgpEU1Ugd2lsbCBjbGVhcmx5IGlkZW50aWZ5IHlvdXIgbmFtZShzKSBhcyB0aGUgYXV0aG9yKHMpIG9yIG93bmVyKHMpIG9mIHRoZQpzdWJtaXNzaW9uLCBhbmQgd2lsbCBub3QgbWFrZSBhbnkgYWx0ZXJhdGlvbiwgb3RoZXIgdGhhbiBhcyBhbGxvd2VkIGJ5IHRoaXMKbGljZW5zZSwgdG8geW91ciBzdWJtaXNzaW9uLgo=Universidadhttps://www.ucu.edu.uy/https://liberi.ucu.edu.uy/oai/requestfranco.pertusso@ucu.edu.uyUruguayopendoar:103422021-11-10T21:02:08LIBERI - Universidad Católica del Uruguayfalse |
| spellingShingle | An affordable post-silicon testing framework applied to a RISC-V based microcontroller Molina Robles, Roberto Post-silicon validation Testing FPGA RISC-V Microcontroller EDA tools Architecture Test generation I/O protocols SPI Testing-plataforms |
| status_str | publishedVersion |
| title | An affordable post-silicon testing framework applied to a RISC-V based microcontroller |
| title_full | An affordable post-silicon testing framework applied to a RISC-V based microcontroller |
| title_fullStr | An affordable post-silicon testing framework applied to a RISC-V based microcontroller |
| title_full_unstemmed | An affordable post-silicon testing framework applied to a RISC-V based microcontroller |
| title_short | An affordable post-silicon testing framework applied to a RISC-V based microcontroller |
| title_sort | An affordable post-silicon testing framework applied to a RISC-V based microcontroller |
| topic | Post-silicon validation Testing FPGA RISC-V Microcontroller EDA tools Architecture Test generation I/O protocols SPI Testing-plataforms |
| url | https://hdl.handle.net/10895/1551 |
