Cita APA (7a ed.)

Ferrer, D., González, R., Fleitas, R., Pérez Acle, J., & Canetti, R. (2004). NeuroFPGA: Implementing artificial neural networks on programmable logic devices.

Cita Chicago Style (17a ed.)

Ferrer, Daniel, Ramiro González, Roberto Fleitas, Julio Pérez Acle, y Rafael Canetti. NeuroFPGA: Implementing Artificial Neural Networks on Programmable Logic Devices. 2004.

Cita MLA (9a ed.)

Ferrer, Daniel, et al. NeuroFPGA: Implementing Artificial Neural Networks on Programmable Logic Devices. 2004.