Common gate LNA design space exploration in all inversion regions

Fiorelli, Rafaella - Silveira, Fernando

Resumen:

The design of CMOS CG-LNAs using a design space exploration proposed for all inversion regions, from weak to strong, is performed in this work. The exploration is done in terms of current consumption, gain and noise figure in the design space (I/D, gm/I/D) showing the trade-offs of designing the CG-LNA in moderate or weak inversion. Finally comparisons between the MATLAB design space exploration and BSIM3v3 simulations using Spectre-RF are done, through the design example of a 900MHz CG-LNA implemented in a 0.35


#956,m CMOS technology. Index Terms : Common Gate LNA, Low power consumption, All inversion regions, Design Methodology, ACM model.


Detalles Bibliográficos
2008
Common Gate LNA
Low power consumption
All inversion regions
Design Methodology
ACM model.
Electrónica
Inglés
Universidad de la República
COLIBRI
https://hdl.handle.net/20.500.12008/38605
Acceso abierto
Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)
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author Fiorelli, Rafaella
author2 Silveira, Fernando
author2_role author
author_facet Fiorelli, Rafaella
Silveira, Fernando
author_role author
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collection COLIBRI
dc.creator.none.fl_str_mv Fiorelli, Rafaella
Silveira, Fernando
dc.date.accessioned.none.fl_str_mv 2023-08-01T20:32:59Z
dc.date.available.none.fl_str_mv 2023-08-01T20:32:59Z
dc.date.issued.es.fl_str_mv 2008
dc.date.submitted.es.fl_str_mv 20230801
dc.description.abstract.none.fl_txt_mv The design of CMOS CG-LNAs using a design space exploration proposed for all inversion regions, from weak to strong, is performed in this work. The exploration is done in terms of current consumption, gain and noise figure in the design space (I/D, gm/I/D) showing the trade-offs of designing the CG-LNA in moderate or weak inversion. Finally comparisons between the MATLAB design space exploration and BSIM3v3 simulations using Spectre-RF are done, through the design example of a 900MHz CG-LNA implemented in a 0.35
#956,m CMOS technology. Index Terms : Common Gate LNA, Low power consumption, All inversion regions, Design Methodology, ACM model.
dc.identifier.citation.es.fl_str_mv Fiorelli, R, Silveira, F. “Common gate LNA design space exploration in all inversion regions”. Argentine School of Micro-Nanoelectronics, Technology and Applications, Buenos Aires, Argentina, 2008.
dc.identifier.uri.none.fl_str_mv https://hdl.handle.net/20.500.12008/38605
dc.language.iso.none.fl_str_mv en
eng
dc.publisher.es.fl_str_mv IEEE
dc.relation.ispartof.es.fl_str_mv Argentine School of Micro-Nanoelectronics, Technology and Applications, Buenos Aires, Argentina, 2008
dc.rights.license.none.fl_str_mv Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
dc.source.none.fl_str_mv reponame:COLIBRI
instname:Universidad de la República
instacron:Universidad de la República
dc.subject.es.fl_str_mv Common Gate LNA
Low power consumption
All inversion regions
Design Methodology
ACM model.
dc.subject.other.es.fl_str_mv Electrónica
dc.title.none.fl_str_mv Common gate LNA design space exploration in all inversion regions
dc.type.es.fl_str_mv Ponencia
dc.type.none.fl_str_mv info:eu-repo/semantics/conferenceObject
dc.type.version.none.fl_str_mv info:eu-repo/semantics/publishedVersion
description The design of CMOS CG-LNAs using a design space exploration proposed for all inversion regions, from weak to strong, is performed in this work. The exploration is done in terms of current consumption, gain and noise figure in the design space (I/D, gm/I/D) showing the trade-offs of designing the CG-LNA in moderate or weak inversion. Finally comparisons between the MATLAB design space exploration and BSIM3v3 simulations using Spectre-RF are done, through the design example of a 900MHz CG-LNA implemented in a 0.35
eu_rights_str_mv openAccess
format conferenceObject
id COLIBRI_de2e81ee93c41178ca6afa1aeba697a8
identifier_str_mv Fiorelli, R, Silveira, F. “Common gate LNA design space exploration in all inversion regions”. Argentine School of Micro-Nanoelectronics, Technology and Applications, Buenos Aires, Argentina, 2008.
instacron_str Universidad de la República
institution Universidad de la República
instname_str Universidad de la República
language eng
language_invalid_str_mv en
network_acronym_str COLIBRI
network_name_str COLIBRI
oai_identifier_str oai:colibri.udelar.edu.uy:20.500.12008/38605
publishDate 2008
reponame_str COLIBRI
repository.mail.fl_str_mv mabel.seroubian@seciu.edu.uy
repository.name.fl_str_mv COLIBRI - Universidad de la República
repository_id_str 4771
rights_invalid_str_mv Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)
spelling 2023-08-01T20:32:59Z2023-08-01T20:32:59Z200820230801Fiorelli, R, Silveira, F. “Common gate LNA design space exploration in all inversion regions”. Argentine School of Micro-Nanoelectronics, Technology and Applications, Buenos Aires, Argentina, 2008.https://hdl.handle.net/20.500.12008/38605The design of CMOS CG-LNAs using a design space exploration proposed for all inversion regions, from weak to strong, is performed in this work. The exploration is done in terms of current consumption, gain and noise figure in the design space (I/D, gm/I/D) showing the trade-offs of designing the CG-LNA in moderate or weak inversion. Finally comparisons between the MATLAB design space exploration and BSIM3v3 simulations using Spectre-RF are done, through the design example of a 900MHz CG-LNA implemented in a 0.35#956,m CMOS technology. Index Terms : Common Gate LNA, Low power consumption, All inversion regions, Design Methodology, ACM model.Made available in DSpace on 2023-08-01T20:32:59Z (GMT). No. of bitstreams: 5 FS08.pdf: 418118 bytes, checksum: a61534787509453afaa032dd47e8d9de (MD5) license_text: 21936 bytes, checksum: 9833653f73f7853880c94a6fead477b1 (MD5) license_url: 49 bytes, checksum: 4afdbb8c545fd630ea7db775da747b2f (MD5) license_rdf: 23148 bytes, checksum: 9da0b6dfac957114c6a7714714b86306 (MD5) license.txt: 4194 bytes, checksum: 7f2e2c17ef6585de66da58d1bfa8b5e1 (MD5) Previous issue date: 2008enengIEEEArgentine School of Micro-Nanoelectronics, Technology and Applications, Buenos Aires, Argentina, 2008Las obras depositadas en el Repositorio se rigen por la Ordenanza de los Derechos de la Propiedad Intelectual de la Universidad De La República. (Res. Nº 91 de C.D.C. de 8/III/1994 – D.O. 7/IV/1994) y por la Ordenanza del Repositorio Abierto de la Universidad de la República (Res. Nº 16 de C.D.C. de 07/10/2014)info:eu-repo/semantics/openAccessLicencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)Common Gate LNALow power consumptionAll inversion regionsDesign MethodologyACM model.ElectrónicaCommon gate LNA design space exploration in all inversion regionsPonenciainfo:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/publishedVersionreponame:COLIBRIinstname:Universidad de la Repúblicainstacron:Universidad de la RepúblicaFiorelli, RafaellaSilveira, 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- Universidad de la Repúblicafalse
spellingShingle Common gate LNA design space exploration in all inversion regions
Fiorelli, Rafaella
Common Gate LNA
Low power consumption
All inversion regions
Design Methodology
ACM model.
Electrónica
status_str publishedVersion
title Common gate LNA design space exploration in all inversion regions
title_full Common gate LNA design space exploration in all inversion regions
title_fullStr Common gate LNA design space exploration in all inversion regions
title_full_unstemmed Common gate LNA design space exploration in all inversion regions
title_short Common gate LNA design space exploration in all inversion regions
title_sort Common gate LNA design space exploration in all inversion regions
topic Common Gate LNA
Low power consumption
All inversion regions
Design Methodology
ACM model.
Electrónica
url https://hdl.handle.net/20.500.12008/38605