Operational amplifier power optimization for a given total (slewing plus linear) settling time
Resumen:
A design procedure that determines the combination of linear settling time (i.e. gain bandwidth) and slew rate that minimizes an amplifier total power consumption, while complying with a given total settling time specification, is presented. The method is presented for a Miller OTA, but can be generalized to other architectures. The proposed approach also provides the optimum combination of the g/sub m//I/sub D/ ratios of the input and output transistors and the transistor design corresponding to this optimum of power consumption. It is shown that the application of fixed "rules of thumb" criteria for the assignment of the allowable linear settling and slewing periods leads to highly increased consumption. The method is based on a simple, design oriented model of the settling behavior that is also described in this paper. This model is checked against experimental results and the design procedure results are verified with SPICE simulations
| 2002 | |
|
Operational amplifiers SPICE Circuit CAD Circuit simulation Circuit optimisation ELECTRÓNICA |
|
| Inglés | |
| Universidad de la República | |
| COLIBRI | |
| https://hdl.handle.net/20.500.12008/21226 | |
| Acceso abierto |
| _version_ | 1807522893995704320 |
|---|---|
| author | Silveira, Fernando |
| author2 | Flandre, Denis |
| author2_role | author |
| author_facet | Silveira, Fernando Flandre, Denis |
| author_role | author |
| bitstream.checksum.fl_str_mv | 6429389a7df7277b72b7924fdc7d47a9 d41d8cd98f00b204e9800998ecf8427e 4afdbb8c545fd630ea7db775da747b2f d41d8cd98f00b204e9800998ecf8427e |
| bitstream.checksumAlgorithm.fl_str_mv | MD5 MD5 MD5 MD5 |
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| collection | COLIBRI |
| dc.creator.none.fl_str_mv | Silveira, Fernando Flandre, Denis |
| dc.date.accessioned.none.fl_str_mv | 2019-07-03T16:36:06Z |
| dc.date.available.none.fl_str_mv | 2019-07-03T16:36:06Z |
| dc.date.issued.es.fl_str_mv | 2002 |
| dc.date.submitted.es.fl_str_mv | 20190703 |
| dc.description.abstract.none.fl_txt_mv | A design procedure that determines the combination of linear settling time (i.e. gain bandwidth) and slew rate that minimizes an amplifier total power consumption, while complying with a given total settling time specification, is presented. The method is presented for a Miller OTA, but can be generalized to other architectures. The proposed approach also provides the optimum combination of the g/sub m//I/sub D/ ratios of the input and output transistors and the transistor design corresponding to this optimum of power consumption. It is shown that the application of fixed "rules of thumb" criteria for the assignment of the allowable linear settling and slewing periods leads to highly increased consumption. The method is based on a simple, design oriented model of the settling behavior that is also described in this paper. This model is checked against experimental results and the design procedure results are verified with SPICE simulations |
| dc.identifier.citation.es.fl_str_mv | Silveira, F, Flandre, D. Operational amplifier power optimization for a given total (slewing plus linear) settling time. 15th Symposium on Integrated Circuits and Systems Design, Porto Alegre, Brazil, 2002. doi 10.1109/SBCCI.2002.1137666 |
| dc.identifier.uri.none.fl_str_mv | https://hdl.handle.net/20.500.12008/21226 |
| dc.language.iso.none.fl_str_mv | en eng |
| dc.publisher.es.fl_str_mv | IEEE |
| dc.rights.none.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.source.none.fl_str_mv | reponame:COLIBRI instname:Universidad de la República instacron:Universidad de la República |
| dc.subject.es.fl_str_mv | Operational amplifiers SPICE Circuit CAD Circuit simulation Circuit optimisation |
| dc.subject.other.es.fl_str_mv | ELECTRÓNICA |
| dc.title.none.fl_str_mv | Operational amplifier power optimization for a given total (slewing plus linear) settling time |
| dc.type.es.fl_str_mv | Artículo |
| dc.type.none.fl_str_mv | info:eu-repo/semantics/article |
| dc.type.version.none.fl_str_mv | info:eu-repo/semantics/publishedVersion |
| description | A design procedure that determines the combination of linear settling time (i.e. gain bandwidth) and slew rate that minimizes an amplifier total power consumption, while complying with a given total settling time specification, is presented. The method is presented for a Miller OTA, but can be generalized to other architectures. The proposed approach also provides the optimum combination of the g/sub m//I/sub D/ ratios of the input and output transistors and the transistor design corresponding to this optimum of power consumption. It is shown that the application of fixed "rules of thumb" criteria for the assignment of the allowable linear settling and slewing periods leads to highly increased consumption. The method is based on a simple, design oriented model of the settling behavior that is also described in this paper. This model is checked against experimental results and the design procedure results are verified with SPICE simulations |
| eu_rights_str_mv | openAccess |
| format | article |
| id | COLIBRI_bdb68aeecb4d1403c1e64f3487a779b4 |
| identifier_str_mv | Silveira, F, Flandre, D. Operational amplifier power optimization for a given total (slewing plus linear) settling time. 15th Symposium on Integrated Circuits and Systems Design, Porto Alegre, Brazil, 2002. doi 10.1109/SBCCI.2002.1137666 |
| instacron_str | Universidad de la República |
| institution | Universidad de la República |
| instname_str | Universidad de la República |
| language | eng |
| language_invalid_str_mv | en |
| network_acronym_str | COLIBRI |
| network_name_str | COLIBRI |
| oai_identifier_str | oai:colibri.udelar.edu.uy:20.500.12008/21226 |
| publishDate | 2002 |
| reponame_str | COLIBRI |
| repository.mail.fl_str_mv | mabel.seroubian@seciu.edu.uy |
| repository.name.fl_str_mv | COLIBRI - Universidad de la República |
| repository_id_str | 4771 |
| spelling | 2019-07-03T16:36:06Z2019-07-03T16:36:06Z200220190703Silveira, F, Flandre, D. Operational amplifier power optimization for a given total (slewing plus linear) settling time. 15th Symposium on Integrated Circuits and Systems Design, Porto Alegre, Brazil, 2002. doi 10.1109/SBCCI.2002.1137666https://hdl.handle.net/20.500.12008/21226A design procedure that determines the combination of linear settling time (i.e. gain bandwidth) and slew rate that minimizes an amplifier total power consumption, while complying with a given total settling time specification, is presented. The method is presented for a Miller OTA, but can be generalized to other architectures. The proposed approach also provides the optimum combination of the g/sub m//I/sub D/ ratios of the input and output transistors and the transistor design corresponding to this optimum of power consumption. It is shown that the application of fixed "rules of thumb" criteria for the assignment of the allowable linear settling and slewing periods leads to highly increased consumption. The method is based on a simple, design oriented model of the settling behavior that is also described in this paper. This model is checked against experimental results and the design procedure results are verified with SPICE simulationsMade available in DSpace on 2019-07-03T16:36:06Z (GMT). No. of bitstreams: 4 license_text: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) license_url: 49 bytes, checksum: 4afdbb8c545fd630ea7db775da747b2f (MD5) license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) license.txt: 4267 bytes, checksum: 6429389a7df7277b72b7924fdc7d47a9 (MD5) Previous issue date: 2002enengIEEELas obras depositadas en el Repositorio se rigen por la Ordenanza de los Derechos de la Propiedad Intelectual de la Universidad De La República. (Res. Nº 91 de C.D.C. de 8/III/1994 – D.O. 7/IV/1994) y por la Ordenanza del Repositorio Abierto de la Universidad de la República (Res. Nº 16 de C.D.C. de 07/10/2014)info:eu-repo/semantics/openAccessOperational amplifiersSPICECircuit CADCircuit simulationCircuit optimisationELECTRÓNICAOperational amplifier power optimization for a given total (slewing plus linear) settling timeArtículoinfo:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionreponame:COLIBRIinstname:Universidad de la Repúblicainstacron:Universidad de la RepúblicaSilveira, FernandoFlandre, DenisElectrónicaMicroelectrónicaLICENSElicense.txttext/plain4267http://localhost:8080/xmlui/bitstream/20.500.12008/21226/4/license.txt6429389a7df7277b72b7924fdc7d47a9MD54CC-LICENSElicense_textapplication/octet-stream0http://localhost:8080/xmlui/bitstream/20.500.12008/21226/1/license_textd41d8cd98f00b204e9800998ecf8427eMD51license_urlapplication/octet-stream49http://localhost:8080/xmlui/bitstream/20.500.12008/21226/2/license_url4afdbb8c545fd630ea7db775da747b2fMD52license_rdfapplication/octet-stream0http://localhost:8080/xmlui/bitstream/20.500.12008/21226/3/license_rdfd41d8cd98f00b204e9800998ecf8427eMD5320.500.12008/212262024-07-24 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- Universidad de la Repúblicafalse |
| spellingShingle | Operational amplifier power optimization for a given total (slewing plus linear) settling time Silveira, Fernando Operational amplifiers SPICE Circuit CAD Circuit simulation Circuit optimisation ELECTRÓNICA |
| status_str | publishedVersion |
| title | Operational amplifier power optimization for a given total (slewing plus linear) settling time |
| title_full | Operational amplifier power optimization for a given total (slewing plus linear) settling time |
| title_fullStr | Operational amplifier power optimization for a given total (slewing plus linear) settling time |
| title_full_unstemmed | Operational amplifier power optimization for a given total (slewing plus linear) settling time |
| title_short | Operational amplifier power optimization for a given total (slewing plus linear) settling time |
| title_sort | Operational amplifier power optimization for a given total (slewing plus linear) settling time |
| topic | Operational amplifiers SPICE Circuit CAD Circuit simulation Circuit optimisation ELECTRÓNICA |
| url | https://hdl.handle.net/20.500.12008/21226 |
