Design and power optimization of CMOS RF Blocks operating in the moderate inversion region
Resumen:
In this work the design of radiofrequency CMOS circuit blocks in the 910MHz ISM band, while biasing the MOS transistor in the moderate inversion region, is analyzed. An amplifier design tool is presented. This tool shows that it exists an optimum in the power consumption for a given gain. Different technologies are compared, using the proposed tool, regarding its performance in terms of gain and power consumption in the design space I D -g m /I D . The frequency limit of the applied transistor model is discussed and comparisons with simulations using BSIM3v3 are presented. Implementation of a power amplifier and a VCO at 910MHz in 0.35μm CMOS technology and experimental results are also shown
2005 | |
CMOS Integrated Circuits Radio frequency Integrated Circuits Amplifier Design Power optimization ELECTRÓNICA |
|
Inglés | |
Universidad de la República | |
COLIBRI | |
https://hdl.handle.net/20.500.12008/21162 | |
Acceso abierto | |
Licencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC - By-NC-ND) |
Resultados similares
-
Pico-A/V range CMOS transconductors using series-parallel current division
Autor(es):: Arnaud, Alfredo
Fecha de publicación:: (2003) -
Sub-1 V, 4 nA CMOS voltage references with digitally-trimmable temperature coefficient
Autor(es):: Luong, Peter
Fecha de publicación:: (2014) -
Is intrinsic noise a limiting factor for subthreshold digital logic in nanoscale CMOS?
Autor(es):: Veirano Núñez, Francisco
Fecha de publicación:: (2015) -
A 110 nA pacemaker sensing channel in CMOS on silicon-on-insulator
Autor(es):: Silveira, Fernando
Fecha de publicación:: (2002) -
Design of a reusable rail-to-rail operational amplifier
Autor(es):: Silveira, Fernando
Fecha de publicación:: (2003)