Design and power optimization of CMOS RF Blocks operating in the moderate inversion region

Barboni, Leonardo - Fiorelli, Rafaella - Silveira, Fernando

Resumen:

In this work the design of radiofrequency CMOS circuit blocks in the 910MHz ISM band, while biasing the MOS transistor in the moderate inversion region, is analyzed. An amplifier design tool is presented. This tool shows that it exists an optimum in the power consumption for a given gain. Different technologies are compared, using the proposed tool, regarding its performance in terms of gain and power consumption in the design space I D -g m /I D . The frequency limit of the applied transistor model is discussed and comparisons with simulations using BSIM3v3 are presented. Implementation of a power amplifier and a VCO at 910MHz in 0.35μm CMOS technology and experimental results are also shown


Detalles Bibliográficos
2005
CMOS Integrated Circuits
Radio frequency Integrated Circuits
Amplifier Design
Power optimization
ELECTRÓNICA
Inglés
Universidad de la República
COLIBRI
https://hdl.handle.net/20.500.12008/21162
Acceso abierto
Licencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC - By-NC-ND)
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author Barboni, Leonardo
author2 Fiorelli, Rafaella
Silveira, Fernando
author2_role author
author
author_facet Barboni, Leonardo
Fiorelli, Rafaella
Silveira, Fernando
author_role author
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collection COLIBRI
dc.creator.none.fl_str_mv Barboni, Leonardo
Fiorelli, Rafaella
Silveira, Fernando
dc.date.accessioned.none.fl_str_mv 2019-07-03T16:35:48Z
dc.date.available.none.fl_str_mv 2019-07-03T16:35:48Z
dc.date.issued.es.fl_str_mv 2005
dc.date.submitted.es.fl_str_mv 20190703
dc.description.abstract.none.fl_txt_mv In this work the design of radiofrequency CMOS circuit blocks in the 910MHz ISM band, while biasing the MOS transistor in the moderate inversion region, is analyzed. An amplifier design tool is presented. This tool shows that it exists an optimum in the power consumption for a given gain. Different technologies are compared, using the proposed tool, regarding its performance in terms of gain and power consumption in the design space I D -g m /I D . The frequency limit of the applied transistor model is discussed and comparisons with simulations using BSIM3v3 are presented. Implementation of a power amplifier and a VCO at 910MHz in 0.35μm CMOS technology and experimental results are also shown
dc.description.es.fl_txt_mv Postprint
dc.identifier.citation.es.fl_str_mv Barboni, L, Fiorelli, R, Silveira, F. Design and power optimization of CMOS RF Blocks operating in the moderate inversion region [en línea] Proceedings of the 18th Symposium on Integrated Circuits and Systems Design. SBCCI '05. Florianópolis, Brasil, 2005. doi 10.1145/1081081.1081117
dc.identifier.uri.none.fl_str_mv https://hdl.handle.net/20.500.12008/21162
dc.language.iso.none.fl_str_mv en
eng
dc.publisher.es.fl_str_mv SBCCI
dc.rights.license.none.fl_str_mv Licencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC - By-NC-ND)
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
dc.source.none.fl_str_mv reponame:COLIBRI
instname:Universidad de la República
instacron:Universidad de la República
dc.subject.es.fl_str_mv CMOS Integrated Circuits
Radio frequency Integrated Circuits
Amplifier Design
Power optimization
dc.subject.other.es.fl_str_mv ELECTRÓNICA
dc.title.none.fl_str_mv Design and power optimization of CMOS RF Blocks operating in the moderate inversion region
dc.type.es.fl_str_mv Artículo
dc.type.none.fl_str_mv info:eu-repo/semantics/article
dc.type.version.none.fl_str_mv info:eu-repo/semantics/publishedVersion
description Postprint
eu_rights_str_mv openAccess
format article
id COLIBRI_acb10b3489d90e5826109ca68b193f26
identifier_str_mv Barboni, L, Fiorelli, R, Silveira, F. Design and power optimization of CMOS RF Blocks operating in the moderate inversion region [en línea] Proceedings of the 18th Symposium on Integrated Circuits and Systems Design. SBCCI '05. Florianópolis, Brasil, 2005. doi 10.1145/1081081.1081117
instacron_str Universidad de la República
institution Universidad de la República
instname_str Universidad de la República
language eng
language_invalid_str_mv en
network_acronym_str COLIBRI
network_name_str COLIBRI
oai_identifier_str oai:colibri.udelar.edu.uy:20.500.12008/21162
publishDate 2005
reponame_str COLIBRI
repository.mail.fl_str_mv mabel.seroubian@seciu.edu.uy
repository.name.fl_str_mv COLIBRI - Universidad de la República
repository_id_str 4771
rights_invalid_str_mv Licencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC - By-NC-ND)
spelling 2019-07-03T16:35:48Z2019-07-03T16:35:48Z200520190703Barboni, L, Fiorelli, R, Silveira, F. Design and power optimization of CMOS RF Blocks operating in the moderate inversion region [en línea] Proceedings of the 18th Symposium on Integrated Circuits and Systems Design. SBCCI '05. Florianópolis, Brasil, 2005. doi 10.1145/1081081.1081117https://hdl.handle.net/20.500.12008/21162PostprintIn this work the design of radiofrequency CMOS circuit blocks in the 910MHz ISM band, while biasing the MOS transistor in the moderate inversion region, is analyzed. An amplifier design tool is presented. This tool shows that it exists an optimum in the power consumption for a given gain. Different technologies are compared, using the proposed tool, regarding its performance in terms of gain and power consumption in the design space I D -g m /I D . The frequency limit of the applied transistor model is discussed and comparisons with simulations using BSIM3v3 are presented. Implementation of a power amplifier and a VCO at 910MHz in 0.35μm CMOS technology and experimental results are also shownMade available in DSpace on 2019-07-03T16:35:48Z (GMT). No. of bitstreams: 5 BFS05.pdf: 281885 bytes, checksum: ff0dd0243e80a37f0d3c389d3b90de88 (MD5) license_text: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) license_url: 49 bytes, checksum: 4afdbb8c545fd630ea7db775da747b2f (MD5) license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) license.txt: 4267 bytes, checksum: 6429389a7df7277b72b7924fdc7d47a9 (MD5) Previous issue date: 2005enengSBCCILas obras depositadas en el Repositorio se rigen por la Ordenanza de los Derechos de la Propiedad Intelectual de la Universidad De La República. (Res. Nº 91 de C.D.C. de 8/III/1994 – D.O. 7/IV/1994) y por la Ordenanza del Repositorio Abierto de la Universidad de la República (Res. Nº 16 de C.D.C. de 07/10/2014)info:eu-repo/semantics/openAccessLicencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC - By-NC-ND)CMOS Integrated CircuitsRadio frequency Integrated CircuitsAmplifier DesignPower optimizationELECTRÓNICADesign and power optimization of CMOS RF Blocks operating in the moderate inversion regionArtículoinfo:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionreponame:COLIBRIinstname:Universidad de la Repúblicainstacron:Universidad de la RepúblicaBarboni, LeonardoFiorelli, RafaellaSilveira, FernandoElectrónicaMicroelectrónicaLICENSElicense.txttext/plain4267http://localhost:8080/xmlui/bitstream/20.500.12008/21162/5/license.txt6429389a7df7277b72b7924fdc7d47a9MD55CC-LICENSElicense_textapplication/octet-stream0http://localhost:8080/xmlui/bitstream/20.500.12008/21162/2/license_textd41d8cd98f00b204e9800998ecf8427eMD52license_urlapplication/octet-stream49http://localhost:8080/xmlui/bitstream/20.500.12008/21162/3/license_url4afdbb8c545fd630ea7db775da747b2fMD53license_rdfapplication/octet-stream0http://localhost:8080/xmlui/bitstream/20.500.12008/21162/4/license_rdfd41d8cd98f00b204e9800998ecf8427eMD54ORIGINALBFS05.pdfapplication/pdf281885http://localhost:8080/xmlui/bitstream/20.500.12008/21162/1/BFS05.pdfff0dd0243e80a37f0d3c389d3b90de88MD5120.500.12008/211622024-07-24 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- Universidad de la Repúblicafalse
spellingShingle Design and power optimization of CMOS RF Blocks operating in the moderate inversion region
Barboni, Leonardo
CMOS Integrated Circuits
Radio frequency Integrated Circuits
Amplifier Design
Power optimization
ELECTRÓNICA
status_str publishedVersion
title Design and power optimization of CMOS RF Blocks operating in the moderate inversion region
title_full Design and power optimization of CMOS RF Blocks operating in the moderate inversion region
title_fullStr Design and power optimization of CMOS RF Blocks operating in the moderate inversion region
title_full_unstemmed Design and power optimization of CMOS RF Blocks operating in the moderate inversion region
title_short Design and power optimization of CMOS RF Blocks operating in the moderate inversion region
title_sort Design and power optimization of CMOS RF Blocks operating in the moderate inversion region
topic CMOS Integrated Circuits
Radio frequency Integrated Circuits
Amplifier Design
Power optimization
ELECTRÓNICA
url https://hdl.handle.net/20.500.12008/21162