A tool for design exploration and power optimization of CMOS RF circuits blocks
Resumen:
A tool that explores the design space of basic RF circuit blocks is presented. The tool takes advantage of the application of an MOS transistor model continuous in all inversion levels (weak to strong inversion). The performance of the circuit is analyzed in the ID -gm/ID plane. The tool shows the existence of an inversion level that provides an optimum in the power consumption for a given gain and frequency. Examples are presented showing how comparison of the performance of different technologies or evaluation of the effect of parasitic elements can be easily done. The tool is applied to the design of a power amplifier and a VCO at 910 MHz in 0.35 mum CMOS technology. The tools estimations are checked against simulations using BSIM3v3, showing very good agreement. Additionally, preliminary experimental results are presented
| 2006 | |
| Electrónica | |
| Inglés | |
| Universidad de la República | |
| COLIBRI | |
| https://hdl.handle.net/20.500.12008/38777 | |
| Acceso abierto | |
| Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| _version_ | 1807522935281287168 |
|---|---|
| author | Barboni, Leonardo |
| author2 | Fiorelli, Rafaella Silveira, Fernando |
| author2_role | author author |
| author_facet | Barboni, Leonardo Fiorelli, Rafaella Silveira, Fernando |
| author_role | author |
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| bitstream.checksumAlgorithm.fl_str_mv | MD5 MD5 MD5 MD5 MD5 |
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| collection | COLIBRI |
| dc.creator.none.fl_str_mv | Barboni, Leonardo Fiorelli, Rafaella Silveira, Fernando |
| dc.date.accessioned.none.fl_str_mv | 2023-08-01T20:33:44Z |
| dc.date.available.none.fl_str_mv | 2023-08-01T20:33:44Z |
| dc.date.issued.es.fl_str_mv | 2006 |
| dc.date.submitted.es.fl_str_mv | 20230801 |
| dc.description.abstract.none.fl_txt_mv | A tool that explores the design space of basic RF circuit blocks is presented. The tool takes advantage of the application of an MOS transistor model continuous in all inversion levels (weak to strong inversion). The performance of the circuit is analyzed in the ID -gm/ID plane. The tool shows the existence of an inversion level that provides an optimum in the power consumption for a given gain and frequency. Examples are presented showing how comparison of the performance of different technologies or evaluation of the effect of parasitic elements can be easily done. The tool is applied to the design of a power amplifier and a VCO at 910 MHz in 0.35 mum CMOS technology. The tools estimations are checked against simulations using BSIM3v3, showing very good agreement. Additionally, preliminary experimental results are presented |
| dc.identifier.citation.es.fl_str_mv | Barboni, L., Fiorelli, R., Silveira, F. A tool for design exploration and power optimization of CMOS RF circuits blocks [Preprint] Publicado en Proceedings of the IEEE International Symposium on Circuits and Systems, Island of Kos, Greece. Doi 10.1109/ISCAS.2006.1693246. |
| dc.identifier.uri.none.fl_str_mv | https://hdl.handle.net/20.500.12008/38777 |
| dc.language.iso.none.fl_str_mv | en eng |
| dc.rights.license.none.fl_str_mv | Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| dc.rights.none.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.source.none.fl_str_mv | reponame:COLIBRI instname:Universidad de la República instacron:Universidad de la República |
| dc.subject.other.es.fl_str_mv | Electrónica |
| dc.title.none.fl_str_mv | A tool for design exploration and power optimization of CMOS RF circuits blocks |
| dc.type.es.fl_str_mv | Preprint |
| dc.type.none.fl_str_mv | info:eu-repo/semantics/preprint |
| dc.type.version.none.fl_str_mv | info:eu-repo/semantics/submittedVersion |
| description | A tool that explores the design space of basic RF circuit blocks is presented. The tool takes advantage of the application of an MOS transistor model continuous in all inversion levels (weak to strong inversion). The performance of the circuit is analyzed in the ID -gm/ID plane. The tool shows the existence of an inversion level that provides an optimum in the power consumption for a given gain and frequency. Examples are presented showing how comparison of the performance of different technologies or evaluation of the effect of parasitic elements can be easily done. The tool is applied to the design of a power amplifier and a VCO at 910 MHz in 0.35 mum CMOS technology. The tools estimations are checked against simulations using BSIM3v3, showing very good agreement. Additionally, preliminary experimental results are presented |
| eu_rights_str_mv | openAccess |
| format | preprint |
| id | COLIBRI_a1b02d474a34111dc93582e147a63e33 |
| identifier_str_mv | Barboni, L., Fiorelli, R., Silveira, F. A tool for design exploration and power optimization of CMOS RF circuits blocks [Preprint] Publicado en Proceedings of the IEEE International Symposium on Circuits and Systems, Island of Kos, Greece. Doi 10.1109/ISCAS.2006.1693246. |
| instacron_str | Universidad de la República |
| institution | Universidad de la República |
| instname_str | Universidad de la República |
| language | eng |
| language_invalid_str_mv | en |
| network_acronym_str | COLIBRI |
| network_name_str | COLIBRI |
| oai_identifier_str | oai:colibri.udelar.edu.uy:20.500.12008/38777 |
| publishDate | 2006 |
| reponame_str | COLIBRI |
| repository.mail.fl_str_mv | mabel.seroubian@seciu.edu.uy |
| repository.name.fl_str_mv | COLIBRI - Universidad de la República |
| repository_id_str | 4771 |
| rights_invalid_str_mv | Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| spelling | 2023-08-01T20:33:44Z2023-08-01T20:33:44Z200620230801Barboni, L., Fiorelli, R., Silveira, F. A tool for design exploration and power optimization of CMOS RF circuits blocks [Preprint] Publicado en Proceedings of the IEEE International Symposium on Circuits and Systems, Island of Kos, Greece. Doi 10.1109/ISCAS.2006.1693246.https://hdl.handle.net/20.500.12008/38777A tool that explores the design space of basic RF circuit blocks is presented. The tool takes advantage of the application of an MOS transistor model continuous in all inversion levels (weak to strong inversion). The performance of the circuit is analyzed in the ID -gm/ID plane. The tool shows the existence of an inversion level that provides an optimum in the power consumption for a given gain and frequency. Examples are presented showing how comparison of the performance of different technologies or evaluation of the effect of parasitic elements can be easily done. The tool is applied to the design of a power amplifier and a VCO at 910 MHz in 0.35 mum CMOS technology. The tools estimations are checked against simulations using BSIM3v3, showing very good agreement. Additionally, preliminary experimental results are presentedMade available in DSpace on 2023-08-01T20:33:44Z (GMT). No. of bitstreams: 5 BFS06.pdf: 216847 bytes, checksum: f1af7cf9a644880c030a8418bd134d9d (MD5) license_text: 21936 bytes, checksum: 9833653f73f7853880c94a6fead477b1 (MD5) license_url: 49 bytes, checksum: 4afdbb8c545fd630ea7db775da747b2f (MD5) license_rdf: 23148 bytes, checksum: 9da0b6dfac957114c6a7714714b86306 (MD5) license.txt: 4194 bytes, checksum: 7f2e2c17ef6585de66da58d1bfa8b5e1 (MD5) Previous issue date: 2006enengLas obras depositadas en el Repositorio se rigen por la Ordenanza de los Derechos de la Propiedad Intelectual de la Universidad De La República. (Res. Nº 91 de C.D.C. de 8/III/1994 – D.O. 7/IV/1994) y por la Ordenanza del Repositorio Abierto de la Universidad de la República (Res. Nº 16 de C.D.C. de 07/10/2014)info:eu-repo/semantics/openAccessLicencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)ElectrónicaA tool for design exploration and power optimization of CMOS RF circuits blocksPreprintinfo:eu-repo/semantics/preprintinfo:eu-repo/semantics/submittedVersionreponame:COLIBRIinstname:Universidad de la Repúblicainstacron:Universidad de la RepúblicaBarboni, LeonardoFiorelli, RafaellaSilveira, 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XMuCgpBdHJpYnVjae+/vW4g77+9IE5vIENvbWVyY2lhbCDvv70gU2luIERlcml2YWRhcyAoQ0MgLSBCeS1OQy1ORCk6IFBlcm1pdGUgdXNhciBsYSBvYnJhLCBwZXJvIG5vIHNlIHBlcm1pdGUgZ2VuZXJhciBvYnJhcyBkZXJpdmFkYXMgeSBubyBzZSBwZXJtaXRlIHVzbyBjb24gZmluZXMgY29tZXJjaWFsZXMsIGRlYmllbmRvIHJlY29ub2NlciBhbCBhdXRvci4KCkxvcyB1c29zIHByZXZpc3RvcyBlbiBsYXMgbGljZW5jaWFzIGluY2x1eWVuIGxhIGVuYWplbmFjae+/vW4sIHJlcHJvZHVjY2nvv71uLCBjb211bmljYWNp77+9biwgcHVibGljYWNp77+9biwgZGlzdHJpYnVjae+/vW4geSBwdWVzdGEgYSBkaXNwb3NpY2nvv71uIGRlbCBw77+9YmxpY28uIExhIGNyZWFjae+/vW4gZGUgb2JyYXMgZGVyaXZhZGFzIGluY2x1eWUgbGEgYWRhcHRhY2nvv71uLCB0cmFkdWNjae+/vW4geSBlbCByZW1peC4KCkN1YW5kbyBzZSBzZWxlY2Npb25lIHVuYSBsaWNlbmNpYSBxdWUgaGFiaWxpdGUgdXNvcyBjb21lcmNpYWxlcywgZWwgZGVw77+9c2l0byBkZWJlcu+/vSBzZXIgYWNvbXBh77+9YWRvIGRlbCBhdmFsIGRlbCBqZXJhcmNhIG3vv714aW1vIGRlbCBTZXJ2aWNpbyBjb3JyZXNwb25kaWVudGUuCgoKCgoKCgoKUniversidadhttps://udelar.edu.uy/https://www.colibri.udelar.edu.uy/oai/requestmabel.seroubian@seciu.edu.uyUruguayopendoar:47712024-07-25T14:33:30.771898COLIBRI - Universidad de la Repúblicafalse |
| spellingShingle | A tool for design exploration and power optimization of CMOS RF circuits blocks Barboni, Leonardo Electrónica |
| status_str | submittedVersion |
| title | A tool for design exploration and power optimization of CMOS RF circuits blocks |
| title_full | A tool for design exploration and power optimization of CMOS RF circuits blocks |
| title_fullStr | A tool for design exploration and power optimization of CMOS RF circuits blocks |
| title_full_unstemmed | A tool for design exploration and power optimization of CMOS RF circuits blocks |
| title_short | A tool for design exploration and power optimization of CMOS RF circuits blocks |
| title_sort | A tool for design exploration and power optimization of CMOS RF circuits blocks |
| topic | Electrónica |
| url | https://hdl.handle.net/20.500.12008/38777 |
