A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA
Resumen:
A new design methodology based on a unified treatment of all the regions of operation of the MOS transistor is proposed. It is intended for the design of CMOS analog circuits and especially suited for low power circuits where the moderate inversion region often is used because it provides a good compromise between speed and power consumption. The synthesis procedure is based on the relation between the ratio of the transconductance over dc drain current g m / I D and the normalized current Io /( W/L). The gm /ID indeed is a universal characteristic of all the transistors belonging to a same process. It may be derived from experimental measurements and fitted with simple analytical models. The method was applied successfully to the design of a silicon-on-insulator (SOI) micropower operational transconductance amplifier (OTA).
1996 | |
ELECTRÓNICA | |
Inglés | |
Universidad de la República | |
COLIBRI | |
https://hdl.handle.net/20.500.12008/20723 | |
Acceso abierto |
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---|---|
author | Silveira, Fernando |
author2 | Flandre, Denis Jespers, Paul |
author2_role | author author |
author_facet | Silveira, Fernando Flandre, Denis Jespers, Paul |
author_role | author |
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bitstream.checksumAlgorithm.fl_str_mv | MD5 MD5 MD5 MD5 |
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collection | COLIBRI |
dc.creator.none.fl_str_mv | Silveira, Fernando Flandre, Denis Jespers, Paul |
dc.date.accessioned.none.fl_str_mv | 2019-05-29T15:27:58Z |
dc.date.available.none.fl_str_mv | 2019-05-29T15:27:58Z |
dc.date.issued.es.fl_str_mv | 1996 |
dc.date.submitted.es.fl_str_mv | 20190528 |
dc.description.abstract.none.fl_txt_mv | A new design methodology based on a unified treatment of all the regions of operation of the MOS transistor is proposed. It is intended for the design of CMOS analog circuits and especially suited for low power circuits where the moderate inversion region often is used because it provides a good compromise between speed and power consumption. The synthesis procedure is based on the relation between the ratio of the transconductance over dc drain current g m / I D and the normalized current Io /( W/L). The gm /ID indeed is a universal characteristic of all the transistors belonging to a same process. It may be derived from experimental measurements and fitted with simple analytical models. The method was applied successfully to the design of a silicon-on-insulator (SOI) micropower operational transconductance amplifier (OTA). |
dc.identifier.citation.es.fl_str_mv | Silveira, Fernando, Flandre, Denis, Jespers, Paul. A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA [en línea] IEEE Journal of Solid-State Circuits, 1996, v.31, no. 9 |
dc.identifier.uri.none.fl_str_mv | https://hdl.handle.net/20.500.12008/20723 |
dc.language.iso.none.fl_str_mv | en eng |
dc.publisher.es.fl_str_mv | IEEE |
dc.relation.ispartof.es.fl_str_mv | IEEE Journal of Solid-State Circuits, 1996, v.31, no. 9 |
dc.rights.none.fl_str_mv | info:eu-repo/semantics/openAccess |
dc.source.none.fl_str_mv | reponame:COLIBRI instname:Universidad de la República instacron:Universidad de la República |
dc.subject.other.es.fl_str_mv | ELECTRÓNICA |
dc.title.none.fl_str_mv | A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA |
dc.type.es.fl_str_mv | Artículo |
dc.type.none.fl_str_mv | info:eu-repo/semantics/article |
dc.type.version.none.fl_str_mv | info:eu-repo/semantics/publishedVersion |
description | A new design methodology based on a unified treatment of all the regions of operation of the MOS transistor is proposed. It is intended for the design of CMOS analog circuits and especially suited for low power circuits where the moderate inversion region often is used because it provides a good compromise between speed and power consumption. The synthesis procedure is based on the relation between the ratio of the transconductance over dc drain current g m / I D and the normalized current Io /( W/L). The gm /ID indeed is a universal characteristic of all the transistors belonging to a same process. It may be derived from experimental measurements and fitted with simple analytical models. The method was applied successfully to the design of a silicon-on-insulator (SOI) micropower operational transconductance amplifier (OTA). |
eu_rights_str_mv | openAccess |
format | article |
id | COLIBRI_9facd50de614366865444058c9c7e365 |
identifier_str_mv | Silveira, Fernando, Flandre, Denis, Jespers, Paul. A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA [en línea] IEEE Journal of Solid-State Circuits, 1996, v.31, no. 9 |
instacron_str | Universidad de la República |
institution | Universidad de la República |
instname_str | Universidad de la República |
language | eng |
language_invalid_str_mv | en |
network_acronym_str | COLIBRI |
network_name_str | COLIBRI |
oai_identifier_str | oai:colibri.udelar.edu.uy:20.500.12008/20723 |
publishDate | 1996 |
reponame_str | COLIBRI |
repository.mail.fl_str_mv | mabel.seroubian@seciu.edu.uy |
repository.name.fl_str_mv | COLIBRI - Universidad de la República |
repository_id_str | 4771 |
spelling | 2019-05-29T15:27:58Z2019-05-29T15:27:58Z199620190528Silveira, Fernando, Flandre, Denis, Jespers, Paul. A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA [en línea] IEEE Journal of Solid-State Circuits, 1996, v.31, no. 9https://hdl.handle.net/20.500.12008/20723A new design methodology based on a unified treatment of all the regions of operation of the MOS transistor is proposed. It is intended for the design of CMOS analog circuits and especially suited for low power circuits where the moderate inversion region often is used because it provides a good compromise between speed and power consumption. The synthesis procedure is based on the relation between the ratio of the transconductance over dc drain current g m / I D and the normalized current Io /( W/L). The gm /ID indeed is a universal characteristic of all the transistors belonging to a same process. It may be derived from experimental measurements and fitted with simple analytical models. The method was applied successfully to the design of a silicon-on-insulator (SOI) micropower operational transconductance amplifier (OTA).Made available in DSpace on 2019-05-29T15:27:58Z (GMT). No. of bitstreams: 4 license_text: 21936 bytes, checksum: 9833653f73f7853880c94a6fead477b1 (MD5) license_url: 49 bytes, checksum: 4afdbb8c545fd630ea7db775da747b2f (MD5) license_rdf: 23148 bytes, checksum: 9da0b6dfac957114c6a7714714b86306 (MD5) license.txt: 4194 bytes, checksum: 7f2e2c17ef6585de66da58d1bfa8b5e1 (MD5) Previous issue date: 1996enengIEEEIEEE Journal of Solid-State Circuits, 1996, v.31, no. 9Las obras depositadas en el Repositorio se rigen por la Ordenanza de los Derechos de la Propiedad Intelectual de la Universidad De La República. (Res. Nº 91 de C.D.C. de 8/III/1994 – D.O. 7/IV/1994) y por la Ordenanza del Repositorio Abierto de la Universidad de la República (Res. Nº 16 de C.D.C. de 07/10/2014)info:eu-repo/semantics/openAccessELECTRÓNICAA gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTAArtículoinfo:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionreponame:COLIBRIinstname:Universidad de la Repúblicainstacron:Universidad de la RepúblicaSilveira, FernandoFlandre, DenisJespers, PaulElectrónicaElectrónicaElectrónica AplicadaMicroelectrónicaLICENSElicense.txttext/plain4194http://localhost:8080/xmlui/bitstream/20.500.12008/20723/4/license.txt7f2e2c17ef6585de66da58d1bfa8b5e1MD54CC-LICENSElicense_textapplication/octet-stream21936http://localhost:8080/xmlui/bitstream/20.500.12008/20723/1/license_text9833653f73f7853880c94a6fead477b1MD51license_urlapplication/octet-stream49http://localhost:8080/xmlui/bitstream/20.500.12008/20723/2/license_url4afdbb8c545fd630ea7db775da747b2fMD52license_rdfapplication/octet-stream23148http://localhost:8080/xmlui/bitstream/20.500.12008/20723/3/license_rdf9da0b6dfac957114c6a7714714b86306MD5320.500.12008/207232024-07-24 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- Universidad de la Repúblicafalse |
spellingShingle | A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA Silveira, Fernando ELECTRÓNICA |
status_str | publishedVersion |
title | A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA |
title_full | A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA |
title_fullStr | A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA |
title_full_unstemmed | A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA |
title_short | A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA |
title_sort | A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA |
topic | ELECTRÓNICA |
url | https://hdl.handle.net/20.500.12008/20723 |