Common source LNA design space exploration in all inversion regions
Resumen:
This work presents a design space exploration procedure valid in all inversion regions, from weak to strong, applied to the design of a CMOS CS-LNA. The exploration is done in terms of current consumption, gain and noise figure in the design space (ID, gm/ID) providing insight into the trade-offs in the selection of the inversion level of the main LNA transistor. Finally comparisons between the MATLAB design space exploration and BSIM3v3 simulations using Spectre-RF are done, through the design example of a 900MHz CS-LNA implemented in a 0,35 um CMOS technology.
nbsp,
| 2009 | |
| Electrónica | |
| Inglés | |
| Universidad de la República | |
| COLIBRI | |
| https://hdl.handle.net/20.500.12008/38683 | |
| Acceso abierto | |
| Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| _version_ | 1807522934275702784 |
|---|---|
| author | Sensale Rodríguez, Berardi |
| author2 | Fiorelli, Rafaella Silveira, Fernando |
| author2_role | author author |
| author_facet | Sensale Rodríguez, Berardi Fiorelli, Rafaella Silveira, Fernando |
| author_role | author |
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| collection | COLIBRI |
| dc.creator.none.fl_str_mv | Sensale Rodríguez, Berardi Fiorelli, Rafaella Silveira, Fernando |
| dc.date.accessioned.none.fl_str_mv | 2023-08-01T20:33:19Z |
| dc.date.available.none.fl_str_mv | 2023-08-01T20:33:19Z |
| dc.date.issued.es.fl_str_mv | 2009 |
| dc.date.submitted.es.fl_str_mv | 20230801 |
| dc.description.abstract.none.fl_txt_mv | This work presents a design space exploration procedure valid in all inversion regions, from weak to strong, applied to the design of a CMOS CS-LNA. The exploration is done in terms of current consumption, gain and noise figure in the design space (ID, gm/ID) providing insight into the trade-offs in the selection of the inversion level of the main LNA transistor. Finally comparisons between the MATLAB design space exploration and BSIM3v3 simulations using Spectre-RF are done, through the design example of a 900MHz CS-LNA implemented in a 0,35 um CMOS technology. nbsp, |
| dc.identifier.citation.es.fl_str_mv | Sensale, B., Fiorelli, R., Silveira, F. Common source LNA design space Exploration in all inversion regions. Memorias del XV Workishop Iberchip. XV Workshop Iberchip Buenos – Argentina, 25, .rzo 2009 – Memorias, |
| dc.identifier.uri.none.fl_str_mv | https://hdl.handle.net/20.500.12008/38683 |
| dc.language.iso.none.fl_str_mv | en eng |
| dc.relation.ispartof.es.fl_str_mv | XV Workshop Buenos Aires, Argentina, 25 al 27 de Marzo 2009. |
| dc.rights.license.none.fl_str_mv | Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| dc.rights.none.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.source.none.fl_str_mv | reponame:COLIBRI instname:Universidad de la República instacron:Universidad de la República |
| dc.subject.other.es.fl_str_mv | Electrónica |
| dc.title.none.fl_str_mv | Common source LNA design space exploration in all inversion regions |
| dc.type.es.fl_str_mv | Ponencia |
| dc.type.none.fl_str_mv | info:eu-repo/semantics/conferenceObject |
| dc.type.version.none.fl_str_mv | info:eu-repo/semantics/publishedVersion |
| description | This work presents a design space exploration procedure valid in all inversion regions, from weak to strong, applied to the design of a CMOS CS-LNA. The exploration is done in terms of current consumption, gain and noise figure in the design space (ID, gm/ID) providing insight into the trade-offs in the selection of the inversion level of the main LNA transistor. Finally comparisons between the MATLAB design space exploration and BSIM3v3 simulations using Spectre-RF are done, through the design example of a 900MHz CS-LNA implemented in a 0,35 um CMOS technology. |
| eu_rights_str_mv | openAccess |
| format | conferenceObject |
| id | COLIBRI_9fa2c8f83cdfd107ae9a397dd33e9303 |
| identifier_str_mv | Sensale, B., Fiorelli, R., Silveira, F. Common source LNA design space Exploration in all inversion regions. Memorias del XV Workishop Iberchip. XV Workshop Iberchip Buenos – Argentina, 25, .rzo 2009 – Memorias, |
| instacron_str | Universidad de la República |
| institution | Universidad de la República |
| instname_str | Universidad de la República |
| language | eng |
| language_invalid_str_mv | en |
| network_acronym_str | COLIBRI |
| network_name_str | COLIBRI |
| oai_identifier_str | oai:colibri.udelar.edu.uy:20.500.12008/38683 |
| publishDate | 2009 |
| reponame_str | COLIBRI |
| repository.mail.fl_str_mv | mabel.seroubian@seciu.edu.uy |
| repository.name.fl_str_mv | COLIBRI - Universidad de la República |
| repository_id_str | 4771 |
| rights_invalid_str_mv | Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| spelling | 2023-08-01T20:33:19Z2023-08-01T20:33:19Z200920230801Sensale, B., Fiorelli, R., Silveira, F. Common source LNA design space Exploration in all inversion regions. Memorias del XV Workishop Iberchip. XV Workshop Iberchip Buenos – Argentina, 25, .rzo 2009 – Memorias,https://hdl.handle.net/20.500.12008/38683This work presents a design space exploration procedure valid in all inversion regions, from weak to strong, applied to the design of a CMOS CS-LNA. The exploration is done in terms of current consumption, gain and noise figure in the design space (ID, gm/ID) providing insight into the trade-offs in the selection of the inversion level of the main LNA transistor. Finally comparisons between the MATLAB design space exploration and BSIM3v3 simulations using Spectre-RF are done, through the design example of a 900MHz CS-LNA implemented in a 0,35 um CMOS technology.nbsp,Made available in DSpace on 2023-08-01T20:33:19Z (GMT). No. of bitstreams: 5 SFS09.pdf: 457598 bytes, checksum: 5e39dbb0d54e36bd0c27538411a3225b (MD5) license_text: 21936 bytes, checksum: 9833653f73f7853880c94a6fead477b1 (MD5) license_url: 49 bytes, checksum: 4afdbb8c545fd630ea7db775da747b2f (MD5) license_rdf: 23148 bytes, checksum: 9da0b6dfac957114c6a7714714b86306 (MD5) license.txt: 4194 bytes, checksum: 7f2e2c17ef6585de66da58d1bfa8b5e1 (MD5) Previous issue date: 2009enengXV Workshop Buenos Aires, Argentina, 25 al 27 de Marzo 2009.Las obras depositadas en el Repositorio se rigen por la Ordenanza de los Derechos de la Propiedad Intelectual de la Universidad De La República. (Res. Nº 91 de C.D.C. de 8/III/1994 – D.O. 7/IV/1994) y por la Ordenanza del Repositorio Abierto de la Universidad de la República (Res. Nº 16 de C.D.C. de 07/10/2014)info:eu-repo/semantics/openAccessLicencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)ElectrónicaCommon source LNA design space exploration in all inversion regionsPonenciainfo:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/publishedVersionreponame:COLIBRIinstname:Universidad de la Repúblicainstacron:Universidad de la RepúblicaSensale Rodríguez, BerardiFiorelli, RafaellaSilveira, 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- Universidad de la Repúblicafalse |
| spellingShingle | Common source LNA design space exploration in all inversion regions Sensale Rodríguez, Berardi Electrónica |
| status_str | publishedVersion |
| title | Common source LNA design space exploration in all inversion regions |
| title_full | Common source LNA design space exploration in all inversion regions |
| title_fullStr | Common source LNA design space exploration in all inversion regions |
| title_full_unstemmed | Common source LNA design space exploration in all inversion regions |
| title_short | Common source LNA design space exploration in all inversion regions |
| title_sort | Common source LNA design space exploration in all inversion regions |
| topic | Electrónica |
| url | https://hdl.handle.net/20.500.12008/38683 |
