The design of a binary ASK noncoherent demodulator circuit in CMOS technology is described. It will be used to decode an ASK signal carrying information from an external programming device to an implantable cardiac pacemaker. The cell, currently being fabricated, has a core die area of 0.29mm2 on a 2.4mm standard CMOS technology with 0.85V nominal threshold voltage. We review the characteristics of the signal and the specifications for the circuit. A non-standard topology is proposed, allowing the circuit to be fully integrated, thus, lowering the component count of the system and increasing reliability. We detail the design to the transistor level with special consideration to the limitations associated with low supply voltage. We emphasize the careful sizing, using the (g m/ID) method, of transistors operating in the weak and moderate inversion regions. This allowed to lower the gate-source and saturation voltages, achieving operation for 2V even in the worst case condition of 1V maximum threshold voltage and 5 mA current consumption. We present simulation results and the cell layout for the proposed circuit and an alternative design. Finally, we draw some conclusions.