An all-inversion-region MOST design methodology applied to a ratioless differential LC-VCO

Fiorelli, Rafaella - Silveira, Fernando - Peralías, Eduardo

Resumen:

This paper presents a general optimization methodology for analog blocks in RF applications, with CMOS nanometer technologies, based on the complete exploration of all-in- version regions of MOS transistor (MOST). The fundamental tool is the systematic use of the MOST gm/ID technique and the description of the real behavior of all devices by means of semi-empirical models. To exemplify this technique, the differential ratioless cross-coupled LC-tank voltage controlled oscillator(LC-VCO) circuit is studied. The implemented design flow minimizes the LC-VCO phase noise considering the constraints of current consumption, output common-mode voltage and output amplitude. To verify the method, six LC-VCO were designed and validated by comparing them with the corresponding electrical simulations.


Detalles Bibliográficos
2012
Optimization
Low power
MOST all-inversion regions
Design Methodology
LC-VCOs
RF
Electrónica
Inglés
Universidad de la República
COLIBRI
https://hdl.handle.net/20.500.12008/41153
Acceso abierto
Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)
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author Fiorelli, Rafaella
author2 Silveira, Fernando
Peralías, Eduardo
author2_role author
author
author_facet Fiorelli, Rafaella
Silveira, Fernando
Peralías, Eduardo
author_role author
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collection COLIBRI
dc.creator.none.fl_str_mv Fiorelli, Rafaella
Silveira, Fernando
Peralías, Eduardo
dc.date.accessioned.none.fl_str_mv 2023-11-14T17:04:33Z
dc.date.available.none.fl_str_mv 2023-11-14T17:04:33Z
dc.date.issued.es.fl_str_mv 2012
dc.date.submitted.es.fl_str_mv 20231114
dc.description.abstract.none.fl_txt_mv This paper presents a general optimization methodology for analog blocks in RF applications, with CMOS nanometer technologies, based on the complete exploration of all-in- version regions of MOS transistor (MOST). The fundamental tool is the systematic use of the MOST gm/ID technique and the description of the real behavior of all devices by means of semi-empirical models. To exemplify this technique, the differential ratioless cross-coupled LC-tank voltage controlled oscillator(LC-VCO) circuit is studied. The implemented design flow minimizes the LC-VCO phase noise considering the constraints of current consumption, output common-mode voltage and output amplitude. To verify the method, six LC-VCO were designed and validated by comparing them with the corresponding electrical simulations.
dc.identifier.citation.es.fl_str_mv Fiorelli, R, Silveira, F, Peralías, E. "An all-inversion-region MOST design methodology applied to a ratioless differential LC-VCO" PRIME 2012. Session WG3 – Analog and Mixed Signal II. Aachen, Germany, 2012.
dc.identifier.uri.none.fl_str_mv https://hdl.handle.net/20.500.12008/41153
dc.language.iso.none.fl_str_mv en
eng
dc.relation.ispartof.es.fl_str_mv PRIME 2012. Session WG3 – Analog and Mixed Signal II. Aachen, Germany
dc.rights.license.none.fl_str_mv Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
dc.source.none.fl_str_mv reponame:COLIBRI
instname:Universidad de la República
instacron:Universidad de la República
dc.subject.es.fl_str_mv Optimization
Low power
MOST all-inversion regions
Design Methodology
LC-VCOs
RF
dc.subject.other.es.fl_str_mv Electrónica
dc.title.none.fl_str_mv An all-inversion-region MOST design methodology applied to a ratioless differential LC-VCO
dc.type.es.fl_str_mv Ponencia
dc.type.none.fl_str_mv info:eu-repo/semantics/conferenceObject
dc.type.version.none.fl_str_mv info:eu-repo/semantics/publishedVersion
description This paper presents a general optimization methodology for analog blocks in RF applications, with CMOS nanometer technologies, based on the complete exploration of all-in- version regions of MOS transistor (MOST). The fundamental tool is the systematic use of the MOST gm/ID technique and the description of the real behavior of all devices by means of semi-empirical models. To exemplify this technique, the differential ratioless cross-coupled LC-tank voltage controlled oscillator(LC-VCO) circuit is studied. The implemented design flow minimizes the LC-VCO phase noise considering the constraints of current consumption, output common-mode voltage and output amplitude. To verify the method, six LC-VCO were designed and validated by comparing them with the corresponding electrical simulations.
eu_rights_str_mv openAccess
format conferenceObject
id COLIBRI_39cbb2e834e87c13f6e105442d179a88
identifier_str_mv Fiorelli, R, Silveira, F, Peralías, E. "An all-inversion-region MOST design methodology applied to a ratioless differential LC-VCO" PRIME 2012. Session WG3 – Analog and Mixed Signal II. Aachen, Germany, 2012.
instacron_str Universidad de la República
institution Universidad de la República
instname_str Universidad de la República
language eng
language_invalid_str_mv en
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publishDate 2012
reponame_str COLIBRI
repository.mail.fl_str_mv mabel.seroubian@seciu.edu.uy
repository.name.fl_str_mv COLIBRI - Universidad de la República
repository_id_str 4771
rights_invalid_str_mv Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)
spelling 2023-11-14T17:04:33Z2023-11-14T17:04:33Z201220231114Fiorelli, R, Silveira, F, Peralías, E. "An all-inversion-region MOST design methodology applied to a ratioless differential LC-VCO" PRIME 2012. Session WG3 – Analog and Mixed Signal II. Aachen, Germany, 2012.https://hdl.handle.net/20.500.12008/41153This paper presents a general optimization methodology for analog blocks in RF applications, with CMOS nanometer technologies, based on the complete exploration of all-in- version regions of MOS transistor (MOST). The fundamental tool is the systematic use of the MOST gm/ID technique and the description of the real behavior of all devices by means of semi-empirical models. To exemplify this technique, the differential ratioless cross-coupled LC-tank voltage controlled oscillator(LC-VCO) circuit is studied. The implemented design flow minimizes the LC-VCO phase noise considering the constraints of current consumption, output common-mode voltage and output amplitude. To verify the method, six LC-VCO were designed and validated by comparing them with the corresponding electrical simulations.Made available in DSpace on 2023-11-14T17:04:33Z (GMT). No. of bitstreams: 5 FSP12.pdf: 1867578 bytes, checksum: a2a0f8b7ac0634ab1da27740100195ba (MD5) license_text: 21936 bytes, checksum: 9833653f73f7853880c94a6fead477b1 (MD5) license_url: 49 bytes, checksum: 4afdbb8c545fd630ea7db775da747b2f (MD5) license_rdf: 23148 bytes, checksum: 9da0b6dfac957114c6a7714714b86306 (MD5) license.txt: 4194 bytes, checksum: 7f2e2c17ef6585de66da58d1bfa8b5e1 (MD5) Previous issue date: 2012enengPRIME 2012. Session WG3 – Analog and Mixed Signal II. Aachen, GermanyLas obras depositadas en el Repositorio se rigen por la Ordenanza de los Derechos de la Propiedad Intelectual de la Universidad De La República. (Res. Nº 91 de C.D.C. de 8/III/1994 – D.O. 7/IV/1994) y por la Ordenanza del Repositorio Abierto de la Universidad de la República (Res. Nº 16 de C.D.C. de 07/10/2014)info:eu-repo/semantics/openAccessLicencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)OptimizationLow powerMOST all-inversion regionsDesign MethodologyLC-VCOsRFElectrónicaAn all-inversion-region MOST design methodology applied to a ratioless differential LC-VCOPonenciainfo:eu-repo/semantics/conferenceObjectinfo:eu-repo/semantics/publishedVersionreponame:COLIBRIinstname:Universidad de la Repúblicainstacron:Universidad de la RepúblicaFiorelli, RafaellaSilveira, FernandoPeralías, EduardoElectrónicaMicroelectrónicaLICENSElicense.txttext/plain4194http://localhost:8080/xmlui/bitstream/20.500.12008/41153/5/license.txt7f2e2c17ef6585de66da58d1bfa8b5e1MD55CC-LICENSElicense_textapplication/octet-stream21936http://localhost:8080/xmlui/bitstream/20.500.12008/41153/2/license_text9833653f73f7853880c94a6fead477b1MD52license_urlapplication/octet-stream49http://localhost:8080/xmlui/bitstream/20.500.12008/41153/3/license_url4afdbb8c545fd630ea7db775da747b2fMD53license_rdfapplication/octet-stream23148http://localhost:8080/xmlui/bitstream/20.500.12008/41153/4/license_rdf9da0b6dfac957114c6a7714714b86306MD54ORIGINALFSP12.pdfapplication/pdf1867578http://localhost:8080/xmlui/bitstream/20.500.12008/41153/1/FSP12.pdfa2a0f8b7ac0634ab1da27740100195baMD5120.500.12008/411532024-07-24 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- Universidad de la Repúblicafalse
spellingShingle An all-inversion-region MOST design methodology applied to a ratioless differential LC-VCO
Fiorelli, Rafaella
Optimization
Low power
MOST all-inversion regions
Design Methodology
LC-VCOs
RF
Electrónica
status_str publishedVersion
title An all-inversion-region MOST design methodology applied to a ratioless differential LC-VCO
title_full An all-inversion-region MOST design methodology applied to a ratioless differential LC-VCO
title_fullStr An all-inversion-region MOST design methodology applied to a ratioless differential LC-VCO
title_full_unstemmed An all-inversion-region MOST design methodology applied to a ratioless differential LC-VCO
title_short An all-inversion-region MOST design methodology applied to a ratioless differential LC-VCO
title_sort An all-inversion-region MOST design methodology applied to a ratioless differential LC-VCO
topic Optimization
Low power
MOST all-inversion regions
Design Methodology
LC-VCOs
RF
Electrónica
url https://hdl.handle.net/20.500.12008/41153