LC-VCO design optimization methodology based on the g_m/I_D ratio for nanometer CMOS technologies
Resumen:
In this paper, an LC voltage-controlled oscillator (LC-VCO) design optimization methodology based on the gm/ID technique and on the exploration of all inversion regions of the MOS transistor (MOST) is presented. An in-depth study of the compromises between phase noise and current consumption permits optimization of the design for given specifications. Semiempirical models of MOSTs and inductors, obtained by simulation, jointly with analytical phase noise models, allow to get a design space map where the design tradeoffs are easily identified. Four LC-VCO designs in different inversion regions in a 90-nm CMOS process are obtained with the proposed methodology and verified with electrical simulations. Finally, the implementation and measurements are presented for a 2.4-GHz VCO operating in moderate inversion. The designed VCO draws 440 μA from a 1.2-V power supply and presents a phase noise of -106.2 dBc/Hz at 400 kHz from the carrier
| 2011 | |
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All inversion regions Design methodology LC voltage-controlled oscillator (LC-VCO) Low power Nanometer CMOS |
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| Inglés | |
| Universidad de la República | |
| COLIBRI | |
| https://hdl.handle.net/20.500.12008/41099 | |
| Acceso abierto | |
| Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| _version_ | 1807522936736710656 |
|---|---|
| author | Fiorelli, Rafaella |
| author2 | Peralías, Eduardo Silveira, Fernando |
| author2_role | author author |
| author_facet | Fiorelli, Rafaella Peralías, Eduardo Silveira, Fernando |
| author_role | author |
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| collection | COLIBRI |
| dc.creator.none.fl_str_mv | Fiorelli, Rafaella Peralías, Eduardo Silveira, Fernando |
| dc.date.accessioned.none.fl_str_mv | 2023-11-14T17:04:16Z |
| dc.date.available.none.fl_str_mv | 2023-11-14T17:04:16Z |
| dc.date.issued.es.fl_str_mv | 2011 |
| dc.date.submitted.es.fl_str_mv | 20231114 |
| dc.description.abstract.none.fl_txt_mv | In this paper, an LC voltage-controlled oscillator (LC-VCO) design optimization methodology based on the gm/ID technique and on the exploration of all inversion regions of the MOS transistor (MOST) is presented. An in-depth study of the compromises between phase noise and current consumption permits optimization of the design for given specifications. Semiempirical models of MOSTs and inductors, obtained by simulation, jointly with analytical phase noise models, allow to get a design space map where the design tradeoffs are easily identified. Four LC-VCO designs in different inversion regions in a 90-nm CMOS process are obtained with the proposed methodology and verified with electrical simulations. Finally, the implementation and measurements are presented for a 2.4-GHz VCO operating in moderate inversion. The designed VCO draws 440 μA from a 1.2-V power supply and presents a phase noise of -106.2 dBc/Hz at 400 kHz from the carrier |
| dc.identifier.citation.es.fl_str_mv | Fiorelli, R, Peralías, E, Silveira, F. "LC-VCO design optimization methodology based on the g_m/I_D ratio for nanometer CMOS technologies" [Preprint] Publicado en: IEEE Transactions on Microwave Theory and Techniques, 2011, v.59, no. 7, ´pp- 1822-1831. doi: 10.1109/TMTT.2011.2132735 |
| dc.identifier.uri.none.fl_str_mv | https://hdl.handle.net/20.500.12008/41099 |
| dc.language.iso.none.fl_str_mv | en eng |
| dc.rights.license.none.fl_str_mv | Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| dc.rights.none.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.source.none.fl_str_mv | reponame:COLIBRI instname:Universidad de la República instacron:Universidad de la República |
| dc.subject.es.fl_str_mv | All inversion regions Design methodology LC voltage-controlled oscillator (LC-VCO) Low power Nanometer CMOS |
| dc.title.none.fl_str_mv | LC-VCO design optimization methodology based on the g_m/I_D ratio for nanometer CMOS technologies |
| dc.type.es.fl_str_mv | Preprint |
| dc.type.none.fl_str_mv | info:eu-repo/semantics/preprint |
| dc.type.version.none.fl_str_mv | info:eu-repo/semantics/submittedVersion |
| description | In this paper, an LC voltage-controlled oscillator (LC-VCO) design optimization methodology based on the gm/ID technique and on the exploration of all inversion regions of the MOS transistor (MOST) is presented. An in-depth study of the compromises between phase noise and current consumption permits optimization of the design for given specifications. Semiempirical models of MOSTs and inductors, obtained by simulation, jointly with analytical phase noise models, allow to get a design space map where the design tradeoffs are easily identified. Four LC-VCO designs in different inversion regions in a 90-nm CMOS process are obtained with the proposed methodology and verified with electrical simulations. Finally, the implementation and measurements are presented for a 2.4-GHz VCO operating in moderate inversion. The designed VCO draws 440 μA from a 1.2-V power supply and presents a phase noise of -106.2 dBc/Hz at 400 kHz from the carrier |
| eu_rights_str_mv | openAccess |
| format | preprint |
| id | COLIBRI_36d566a42d1b1285fa3706ae59344486 |
| identifier_str_mv | Fiorelli, R, Peralías, E, Silveira, F. "LC-VCO design optimization methodology based on the g_m/I_D ratio for nanometer CMOS technologies" [Preprint] Publicado en: IEEE Transactions on Microwave Theory and Techniques, 2011, v.59, no. 7, ´pp- 1822-1831. doi: 10.1109/TMTT.2011.2132735 |
| instacron_str | Universidad de la República |
| institution | Universidad de la República |
| instname_str | Universidad de la República |
| language | eng |
| language_invalid_str_mv | en |
| network_acronym_str | COLIBRI |
| network_name_str | COLIBRI |
| oai_identifier_str | oai:colibri.udelar.edu.uy:20.500.12008/41099 |
| publishDate | 2011 |
| reponame_str | COLIBRI |
| repository.mail.fl_str_mv | mabel.seroubian@seciu.edu.uy |
| repository.name.fl_str_mv | COLIBRI - Universidad de la República |
| repository_id_str | 4771 |
| rights_invalid_str_mv | Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| spelling | 2023-11-14T17:04:16Z2023-11-14T17:04:16Z201120231114Fiorelli, R, Peralías, E, Silveira, F. "LC-VCO design optimization methodology based on the g_m/I_D ratio for nanometer CMOS technologies" [Preprint] Publicado en: IEEE Transactions on Microwave Theory and Techniques, 2011, v.59, no. 7, ´pp- 1822-1831. doi: 10.1109/TMTT.2011.2132735https://hdl.handle.net/20.500.12008/41099In this paper, an LC voltage-controlled oscillator (LC-VCO) design optimization methodology based on the gm/ID technique and on the exploration of all inversion regions of the MOS transistor (MOST) is presented. An in-depth study of the compromises between phase noise and current consumption permits optimization of the design for given specifications. Semiempirical models of MOSTs and inductors, obtained by simulation, jointly with analytical phase noise models, allow to get a design space map where the design tradeoffs are easily identified. Four LC-VCO designs in different inversion regions in a 90-nm CMOS process are obtained with the proposed methodology and verified with electrical simulations. Finally, the implementation and measurements are presented for a 2.4-GHz VCO operating in moderate inversion. The designed VCO draws 440 μA from a 1.2-V power supply and presents a phase noise of -106.2 dBc/Hz at 400 kHz from the carrierMade available in DSpace on 2023-11-14T17:04:16Z (GMT). No. of bitstreams: 5 FPS11.pdf: 3213451 bytes, checksum: 3da49682d301757946eaa91b3a768277 (MD5) license_text: 21936 bytes, checksum: 9833653f73f7853880c94a6fead477b1 (MD5) license_url: 49 bytes, checksum: 4afdbb8c545fd630ea7db775da747b2f (MD5) license_rdf: 23148 bytes, checksum: 9da0b6dfac957114c6a7714714b86306 (MD5) license.txt: 4194 bytes, checksum: 7f2e2c17ef6585de66da58d1bfa8b5e1 (MD5) Previous issue date: 2011enengLas obras depositadas en el Repositorio se rigen por la Ordenanza de los Derechos de la Propiedad Intelectual de la Universidad De La República. (Res. Nº 91 de C.D.C. de 8/III/1994 – D.O. 7/IV/1994) y por la Ordenanza del Repositorio Abierto de la Universidad de la República (Res. Nº 16 de C.D.C. de 07/10/2014)info:eu-repo/semantics/openAccessLicencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)All inversion regionsDesign methodologyLC voltage-controlled oscillator (LC-VCO)Low powerNanometer CMOSLC-VCO design optimization methodology based on the g_m/I_D ratio for nanometer CMOS technologiesPreprintinfo:eu-repo/semantics/preprintinfo:eu-repo/semantics/submittedVersionreponame:COLIBRIinstname:Universidad de la Repúblicainstacron:Universidad de la RepúblicaFiorelli, RafaellaPeralías, EduardoSilveira, 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- Universidad de la Repúblicafalse |
| spellingShingle | LC-VCO design optimization methodology based on the g_m/I_D ratio for nanometer CMOS technologies Fiorelli, Rafaella All inversion regions Design methodology LC voltage-controlled oscillator (LC-VCO) Low power Nanometer CMOS |
| status_str | submittedVersion |
| title | LC-VCO design optimization methodology based on the g_m/I_D ratio for nanometer CMOS technologies |
| title_full | LC-VCO design optimization methodology based on the g_m/I_D ratio for nanometer CMOS technologies |
| title_fullStr | LC-VCO design optimization methodology based on the g_m/I_D ratio for nanometer CMOS technologies |
| title_full_unstemmed | LC-VCO design optimization methodology based on the g_m/I_D ratio for nanometer CMOS technologies |
| title_short | LC-VCO design optimization methodology based on the g_m/I_D ratio for nanometer CMOS technologies |
| title_sort | LC-VCO design optimization methodology based on the g_m/I_D ratio for nanometer CMOS technologies |
| topic | All inversion regions Design methodology LC voltage-controlled oscillator (LC-VCO) Low power Nanometer CMOS |
| url | https://hdl.handle.net/20.500.12008/41099 |
