Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits
Resumen:
This paper demonstrates that fully-depleted (FD) silicon-on-insulator (SOI) technology offers unique opportunities in the field of low-voltage, low-power CMOS circuits. Beside the well-known reduction of parasitic capacitances due to dielectric isolation, FD SOI MOSFETs indeed exhibit near-ideal body factor, subthreshold slope and current drive. These assets are both theoretically and experimentally investigated. Original circuit studies then show how a basic FD SOI CMOS process allows for the mixed fabrication and operation under low supply voltage of analog, digital and microwave components with properties significantly superior to those obtained on bulk CMOS. Experimental circuit realizations support the analysis.
| 1999 | |
| ELECTRÓNICA | |
| Inglés | |
| Universidad de la República | |
| COLIBRI | |
| https://hdl.handle.net/20.500.12008/20774 | |
| Acceso abierto |
| _version_ | 1807522891232706560 |
|---|---|
| author | Flandre, Denis |
| author2 | Colinge, J. P Chen, J De Ceuster, D Eggermont, J. P Ferreira, L Gentinne, B Jespers, Paul Viviani, A Gillon, R Raskin, J. P Vander Vorst, A Valiente, Gabriel Silveira, Fernando |
| author2_role | author author author author author author author author author author author author author |
| author_facet | Flandre, Denis Colinge, J. P Chen, J De Ceuster, D Eggermont, J. P Ferreira, L Gentinne, B Jespers, Paul Viviani, A Gillon, R Raskin, J. P Vander Vorst, A Valiente, Gabriel Silveira, Fernando |
| author_role | author |
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| collection | COLIBRI |
| dc.creator.none.fl_str_mv | Flandre, Denis Colinge, J. P Chen, J De Ceuster, D Eggermont, J. P Ferreira, L Gentinne, B Jespers, Paul Viviani, A Gillon, R Raskin, J. P Vander Vorst, A Valiente, Gabriel Silveira, Fernando |
| dc.date.accessioned.none.fl_str_mv | 2019-05-29T15:28:13Z |
| dc.date.available.none.fl_str_mv | 2019-05-29T15:28:13Z |
| dc.date.issued.es.fl_str_mv | 1999 |
| dc.date.submitted.es.fl_str_mv | 20190528 |
| dc.description.abstract.none.fl_txt_mv | This paper demonstrates that fully-depleted (FD) silicon-on-insulator (SOI) technology offers unique opportunities in the field of low-voltage, low-power CMOS circuits. Beside the well-known reduction of parasitic capacitances due to dielectric isolation, FD SOI MOSFETs indeed exhibit near-ideal body factor, subthreshold slope and current drive. These assets are both theoretically and experimentally investigated. Original circuit studies then show how a basic FD SOI CMOS process allows for the mixed fabrication and operation under low supply voltage of analog, digital and microwave components with properties significantly superior to those obtained on bulk CMOS. Experimental circuit realizations support the analysis. |
| dc.identifier.citation.es.fl_str_mv | Flandre, Denis, Colinge, J. P., Chen, J., De Ceuster, D., Eggermont, J. P., Ferreira, L., Gentinne, B., Jespers, Paul, Viviani, A., Gillon, R., Raskin, J. P., Vander Vorst, A., Valiente, Gabriel, Silveira, Fernando. Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits [en línea] Analog Integrated Circuits and Signal Processing, 1999, v. 21 |
| dc.identifier.uri.none.fl_str_mv | https://hdl.handle.net/20.500.12008/20774 |
| dc.language.iso.none.fl_str_mv | en eng |
| dc.publisher.es.fl_str_mv | Kluwer |
| dc.relation.ispartof.es.fl_str_mv | Analog Integrated Circuits and Signal Processing, 1999, v. 21 |
| dc.rights.none.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.source.none.fl_str_mv | reponame:COLIBRI instname:Universidad de la República instacron:Universidad de la República |
| dc.subject.other.es.fl_str_mv | ELECTRÓNICA |
| dc.title.none.fl_str_mv | Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits |
| dc.type.es.fl_str_mv | Artículo |
| dc.type.none.fl_str_mv | info:eu-repo/semantics/article |
| dc.type.version.none.fl_str_mv | info:eu-repo/semantics/publishedVersion |
| description | This paper demonstrates that fully-depleted (FD) silicon-on-insulator (SOI) technology offers unique opportunities in the field of low-voltage, low-power CMOS circuits. Beside the well-known reduction of parasitic capacitances due to dielectric isolation, FD SOI MOSFETs indeed exhibit near-ideal body factor, subthreshold slope and current drive. These assets are both theoretically and experimentally investigated. Original circuit studies then show how a basic FD SOI CMOS process allows for the mixed fabrication and operation under low supply voltage of analog, digital and microwave components with properties significantly superior to those obtained on bulk CMOS. Experimental circuit realizations support the analysis. |
| eu_rights_str_mv | openAccess |
| format | article |
| id | COLIBRI_2cd818f845652f6a4daeb7f763543d58 |
| identifier_str_mv | Flandre, Denis, Colinge, J. P., Chen, J., De Ceuster, D., Eggermont, J. P., Ferreira, L., Gentinne, B., Jespers, Paul, Viviani, A., Gillon, R., Raskin, J. P., Vander Vorst, A., Valiente, Gabriel, Silveira, Fernando. Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits [en línea] Analog Integrated Circuits and Signal Processing, 1999, v. 21 |
| instacron_str | Universidad de la República |
| institution | Universidad de la República |
| instname_str | Universidad de la República |
| language | eng |
| language_invalid_str_mv | en |
| network_acronym_str | COLIBRI |
| network_name_str | COLIBRI |
| oai_identifier_str | oai:colibri.udelar.edu.uy:20.500.12008/20774 |
| publishDate | 1999 |
| reponame_str | COLIBRI |
| repository.mail.fl_str_mv | mabel.seroubian@seciu.edu.uy |
| repository.name.fl_str_mv | COLIBRI - Universidad de la República |
| repository_id_str | 4771 |
| spelling | 2019-05-29T15:28:13Z2019-05-29T15:28:13Z199920190528Flandre, Denis, Colinge, J. P., Chen, J., De Ceuster, D., Eggermont, J. P., Ferreira, L., Gentinne, B., Jespers, Paul, Viviani, A., Gillon, R., Raskin, J. P., Vander Vorst, A., Valiente, Gabriel, Silveira, Fernando. Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits [en línea] Analog Integrated Circuits and Signal Processing, 1999, v. 21https://hdl.handle.net/20.500.12008/20774This paper demonstrates that fully-depleted (FD) silicon-on-insulator (SOI) technology offers unique opportunities in the field of low-voltage, low-power CMOS circuits. Beside the well-known reduction of parasitic capacitances due to dielectric isolation, FD SOI MOSFETs indeed exhibit near-ideal body factor, subthreshold slope and current drive. These assets are both theoretically and experimentally investigated. Original circuit studies then show how a basic FD SOI CMOS process allows for the mixed fabrication and operation under low supply voltage of analog, digital and microwave components with properties significantly superior to those obtained on bulk CMOS. Experimental circuit realizations support the analysis.Made available in DSpace on 2019-05-29T15:28:13Z (GMT). No. of bitstreams: 4 license_text: 21936 bytes, checksum: 9833653f73f7853880c94a6fead477b1 (MD5) license_url: 49 bytes, checksum: 4afdbb8c545fd630ea7db775da747b2f (MD5) license_rdf: 23148 bytes, checksum: 9da0b6dfac957114c6a7714714b86306 (MD5) license.txt: 4194 bytes, checksum: 7f2e2c17ef6585de66da58d1bfa8b5e1 (MD5) Previous issue date: 1999enengKluwerAnalog Integrated Circuits and Signal Processing, 1999, v. 21Las obras depositadas en el Repositorio se rigen por la Ordenanza de los Derechos de la Propiedad Intelectual de la Universidad De La República. (Res. Nº 91 de C.D.C. de 8/III/1994 – D.O. 7/IV/1994) y por la Ordenanza del Repositorio Abierto de la Universidad de la República (Res. Nº 16 de C.D.C. de 07/10/2014)info:eu-repo/semantics/openAccessELECTRÓNICAFully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave CircuitsArtículoinfo:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionreponame:COLIBRIinstname:Universidad de la Repúblicainstacron:Universidad de la RepúblicaFlandre, DenisColinge, J. PChen, JDe Ceuster, DEggermont, J. PFerreira, LGentinne, BJespers, PaulViviani, AGillon, RRaskin, J. PVander Vorst, AValiente, GabrielSilveira, FernandoElectrónicaElectrónicaElectrónica AplicadaMicroelectrónicaLICENSElicense.txttext/plain4194http://localhost:8080/xmlui/bitstream/20.500.12008/20774/4/license.txt7f2e2c17ef6585de66da58d1bfa8b5e1MD54CC-LICENSElicense_textapplication/octet-stream21936http://localhost:8080/xmlui/bitstream/20.500.12008/20774/1/license_text9833653f73f7853880c94a6fead477b1MD51license_urlapplication/octet-stream49http://localhost:8080/xmlui/bitstream/20.500.12008/20774/2/license_url4afdbb8c545fd630ea7db775da747b2fMD52license_rdfapplication/octet-stream23148http://localhost:8080/xmlui/bitstream/20.500.12008/20774/3/license_rdf9da0b6dfac957114c6a7714714b86306MD5320.500.12008/207742024-07-24 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- Universidad de la Repúblicafalse |
| spellingShingle | Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits Flandre, Denis ELECTRÓNICA |
| status_str | publishedVersion |
| title | Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits |
| title_full | Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits |
| title_fullStr | Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits |
| title_full_unstemmed | Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits |
| title_short | Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits |
| title_sort | Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits |
| topic | ELECTRÓNICA |
| url | https://hdl.handle.net/20.500.12008/20774 |
