Relaxing the maximum dc input amplitude vs. consumption trade-off in differential-input band-pass biquad filters.

Oreggioni, Julián - Castro Lisboa, Pablo - Silveira, Fernando

Resumen:

This paper shows that an important part of the power consumption of a biquad band‐pass filter is associated with the feedback loop that fixes the high‐pass frequency and blocks the direct current (dc) input signals. The dc input amplitude that can be blocked is related to the maximum output current that one of the transconductors can provide, hence impacting on the required consumption through this effect. Then, a technique that efficiently blocks the dc input signal and fixes the high‐pass frequency is introduced and analyzed in depth. Moreover, an architecture for ultra‐low‐power differential‐input biquads is fully presented. The proposed architecture enables lowering the power consumption or blocking higher levels of dc input without jeopardizing the power consumption. Results show that the proposed architecture, compared with a traditional one, presents a 30% reduction in power consumption and more than doubles the dc input that can be blocked.


Detalles Bibliográficos
2016
Analog integrated circuits
Ultra‐low‐power design
Biquadratic filter
Active filter
Differential amplifiers
Inglés
Universidad de la República
COLIBRI
https://hdl.handle.net/20.500.12008/23976
Acceso abierto
Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)
Resumen:
Sumario:This paper shows that an important part of the power consumption of a biquad band‐pass filter is associated with the feedback loop that fixes the high‐pass frequency and blocks the direct current (dc) input signals. The dc input amplitude that can be blocked is related to the maximum output current that one of the transconductors can provide, hence impacting on the required consumption through this effect. Then, a technique that efficiently blocks the dc input signal and fixes the high‐pass frequency is introduced and analyzed in depth. Moreover, an architecture for ultra‐low‐power differential‐input biquads is fully presented. The proposed architecture enables lowering the power consumption or blocking higher levels of dc input without jeopardizing the power consumption. Results show that the proposed architecture, compared with a traditional one, presents a 30% reduction in power consumption and more than doubles the dc input that can be blocked.