Variability-aware design method for a constant inversion level bias current generator
Resumen:
A model for estimating the dispersion in the output of a MOS-only, constant inversion level, current reference is presented. Based on such model, a design method is introduced that allows to minimize dispersion for a given layout complexity. The method was applied to five different designs producing currents from 2.4 nA to 4.2 nA (@ 300 K) and simulated dispersions with Cadence Spectre ranging from 1.3% to 1.5% (1 σ) while the model predicted dispersions from 1.2% to 1.4%.
| 2018 | |
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Current References MOS transistors Mismatch ACM Temperature effects |
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| Inglés | |
| Universidad de la República | |
| COLIBRI | |
| https://hdl.handle.net/20.500.12008/23858 | |
| Acceso abierto | |
| Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| _version_ | 1807522895713271808 |
|---|---|
| author | Antúnez, Guillermo |
| author2 | Siniscalchi, Mariana Silveira, Fernando Rossi, Conrado |
| author2_role | author author author |
| author_facet | Antúnez, Guillermo Siniscalchi, Mariana Silveira, Fernando Rossi, Conrado |
| author_role | author |
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| collection | COLIBRI |
| dc.contributor.filiacion.none.fl_str_mv | Antúnez Guillermo, Universidad de la República (Uruguay). Facultad de Ingeniería. Siniscalchi Mariana, Universidad de la República (Uruguay). Facultad de Ingeniería. Silveira Fernando, Universidad de la República (Uruguay). Facultad de Ingeniería. Rossi Conrado, Universidad de la República (Uruguay). Facultad de Ingeniería. |
| dc.creator.none.fl_str_mv | Antúnez, Guillermo Siniscalchi, Mariana Silveira, Fernando Rossi, Conrado |
| dc.date.accessioned.none.fl_str_mv | 2020-05-06T23:11:01Z |
| dc.date.available.none.fl_str_mv | 2020-05-06T23:11:01Z |
| dc.date.issued.none.fl_str_mv | 2018 |
| dc.description.abstract.none.fl_txt_mv | A model for estimating the dispersion in the output of a MOS-only, constant inversion level, current reference is presented. Based on such model, a design method is introduced that allows to minimize dispersion for a given layout complexity. The method was applied to five different designs producing currents from 2.4 nA to 4.2 nA (@ 300 K) and simulated dispersions with Cadence Spectre ranging from 1.3% to 1.5% (1 σ) while the model predicted dispersions from 1.2% to 1.4%. |
| dc.format.extent.es.fl_str_mv | 4 p. |
| dc.format.mimetype.es.fl_str_mv | application/pdf |
| dc.identifier.citation.es.fl_str_mv | Antúnez, G., Siniscalchi, M., Silveira, F. y otros. Variability-aware design method for a constant inversion level bias current generator [Preprint] Publicado en : IEEE 9th Latin American Symposium on Circuits & Systems, Puerto Vallarta, México, 25-28 feb, 2018. DOI: 10.1109/LASCAS.2018.8399898 |
| dc.identifier.uri.none.fl_str_mv | https://hdl.handle.net/20.500.12008/23858 |
| dc.language.iso.none.fl_str_mv | en eng |
| dc.publisher.es.fl_str_mv | IEEE |
| dc.relation.ispartof.es.fl_str_mv | 2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS), Puerto Vallarta, México, 25-28 feb |
| dc.rights.license.none.fl_str_mv | Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| dc.rights.none.fl_str_mv | info:eu-repo/semantics/openAccess |
| dc.source.none.fl_str_mv | reponame:COLIBRI instname:Universidad de la República instacron:Universidad de la República |
| dc.subject.es.fl_str_mv | Current References MOS transistors Mismatch ACM Temperature effects |
| dc.title.none.fl_str_mv | Variability-aware design method for a constant inversion level bias current generator |
| dc.type.es.fl_str_mv | Preprint |
| dc.type.none.fl_str_mv | info:eu-repo/semantics/preprint |
| dc.type.version.none.fl_str_mv | info:eu-repo/semantics/submittedVersion |
| description | A model for estimating the dispersion in the output of a MOS-only, constant inversion level, current reference is presented. Based on such model, a design method is introduced that allows to minimize dispersion for a given layout complexity. The method was applied to five different designs producing currents from 2.4 nA to 4.2 nA (@ 300 K) and simulated dispersions with Cadence Spectre ranging from 1.3% to 1.5% (1 σ) while the model predicted dispersions from 1.2% to 1.4%. |
| eu_rights_str_mv | openAccess |
| format | preprint |
| id | COLIBRI_1d87148d21c307c0d3e863eafa677e62 |
| identifier_str_mv | Antúnez, G., Siniscalchi, M., Silveira, F. y otros. Variability-aware design method for a constant inversion level bias current generator [Preprint] Publicado en : IEEE 9th Latin American Symposium on Circuits & Systems, Puerto Vallarta, México, 25-28 feb, 2018. DOI: 10.1109/LASCAS.2018.8399898 |
| instacron_str | Universidad de la República |
| institution | Universidad de la República |
| instname_str | Universidad de la República |
| language | eng |
| language_invalid_str_mv | en |
| network_acronym_str | COLIBRI |
| network_name_str | COLIBRI |
| oai_identifier_str | oai:colibri.udelar.edu.uy:20.500.12008/23858 |
| publishDate | 2018 |
| reponame_str | COLIBRI |
| repository.mail.fl_str_mv | mabel.seroubian@seciu.edu.uy |
| repository.name.fl_str_mv | COLIBRI - Universidad de la República |
| repository_id_str | 4771 |
| rights_invalid_str_mv | Licencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0) |
| spelling | Antúnez Guillermo, Universidad de la República (Uruguay). Facultad de Ingeniería.Siniscalchi Mariana, Universidad de la República (Uruguay). Facultad de Ingeniería.Silveira Fernando, Universidad de la República (Uruguay). Facultad de Ingeniería.Rossi Conrado, Universidad de la República (Uruguay). Facultad de Ingeniería.2020-05-06T23:11:01Z2020-05-06T23:11:01Z2018Antúnez, G., Siniscalchi, M., Silveira, F. y otros. Variability-aware design method for a constant inversion level bias current generator [Preprint] Publicado en : IEEE 9th Latin American Symposium on Circuits & Systems, Puerto Vallarta, México, 25-28 feb, 2018. DOI: 10.1109/LASCAS.2018.8399898https://hdl.handle.net/20.500.12008/23858A model for estimating the dispersion in the output of a MOS-only, constant inversion level, current reference is presented. Based on such model, a design method is introduced that allows to minimize dispersion for a given layout complexity. The method was applied to five different designs producing currents from 2.4 nA to 4.2 nA (@ 300 K) and simulated dispersions with Cadence Spectre ranging from 1.3% to 1.5% (1 σ) while the model predicted dispersions from 1.2% to 1.4%.Submitted by Ribeiro Jorge (jribeiro@fing.edu.uy) on 2020-05-06T19:31:13Z No. of bitstreams: 2 license_rdf: 23149 bytes, checksum: 1996b8461bc290aef6a27d78c67b6b52 (MD5) ASSR18.pdf: 308414 bytes, checksum: 00f908c23a945b9d56bb017ba6e4d958 (MD5)Approved for entry into archive by Machado Jimena (jmachado@fing.edu.uy) on 2020-05-06T22:21:16Z (GMT) No. of bitstreams: 2 license_rdf: 23149 bytes, checksum: 1996b8461bc290aef6a27d78c67b6b52 (MD5) ASSR18.pdf: 308414 bytes, checksum: 00f908c23a945b9d56bb017ba6e4d958 (MD5)Made available in DSpace by Luna Fabiana (fabiana.luna@fic.edu.uy) on 2020-05-06T23:11:01Z (GMT). No. of bitstreams: 2 license_rdf: 23149 bytes, checksum: 1996b8461bc290aef6a27d78c67b6b52 (MD5) ASSR18.pdf: 308414 bytes, checksum: 00f908c23a945b9d56bb017ba6e4d958 (MD5) Previous issue date: 20184 p.application/pdfenengIEEE2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS), Puerto Vallarta, México, 25-28 febLas obras depositadas en el Repositorio se rigen por la Ordenanza de los Derechos de la Propiedad Intelectual de la Universidad de la República.(Res. Nº 91 de C.D.C. de 8/III/1994 – D.O. 7/IV/1994) y por la Ordenanza del Repositorio Abierto de la Universidad de la República (Res. Nº 16 de C.D.C. de 07/10/2014)info:eu-repo/semantics/openAccessLicencia Creative Commons Atribución - No Comercial - Sin Derivadas (CC - By-NC-ND 4.0)Current ReferencesMOS transistorsMismatchACMTemperature effectsVariability-aware design method for a constant inversion level bias current generatorPreprintinfo:eu-repo/semantics/preprintinfo:eu-repo/semantics/submittedVersionreponame:COLIBRIinstname:Universidad de la Repúblicainstacron:Universidad de la RepúblicaAntúnez, GuillermoSiniscalchi, MarianaSilveira, FernandoRossi, ConradoLICENSElicense.txtlicense.txttext/plain; charset=utf-84267http://localhost:8080/xmlui/bitstream/20.500.12008/23858/5/license.txt6429389a7df7277b72b7924fdc7d47a9MD55CC-LICENSElicense_urllicense_urltext/plain; charset=utf-850http://localhost:8080/xmlui/bitstream/20.500.12008/23858/2/license_urla006180e3f5b2ad0b88185d14284c0e0MD52license_textlicense_texttext/html; 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- Universidad de la Repúblicafalse |
| spellingShingle | Variability-aware design method for a constant inversion level bias current generator Antúnez, Guillermo Current References MOS transistors Mismatch ACM Temperature effects |
| status_str | submittedVersion |
| title | Variability-aware design method for a constant inversion level bias current generator |
| title_full | Variability-aware design method for a constant inversion level bias current generator |
| title_fullStr | Variability-aware design method for a constant inversion level bias current generator |
| title_full_unstemmed | Variability-aware design method for a constant inversion level bias current generator |
| title_short | Variability-aware design method for a constant inversion level bias current generator |
| title_sort | Variability-aware design method for a constant inversion level bias current generator |
| topic | Current References MOS transistors Mismatch ACM Temperature effects |
| url | https://hdl.handle.net/20.500.12008/23858 |
